Re: [PATCH v1 7/9] riscv: dts: add initial SpacemiT K1 SoC device tree

Conor Dooley
2024-06-17T13:30:24Z

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On Mon, Jun 17, 2024 at 08:49:57PM +0800, Jisheng Zhang wrote:
> On Mon, Jun 17, 2024 at 01:20:52AM +0800, Yangyu Chen wrote:
> > Banana Pi BPI-F3 motherboard is powered by SpacemiT K1[1].
> >
> > Key features:
> > - 4 cores per cluster, 2 clusters on chip
> > - UART IP is Intel XScale UART
> >
> > Some key considerations:
> > - ISA string is inferred from vendor documentation[2]
> > - Cluster topology is inferred from datasheet[1] and L2 in vendor dts[3]
> > - No coherent DMA on this board
> > Inferred by taking vendor ethernet and MMC drivers to the mainline
> > kernel. Without dma-noncoherent in soc node, the driver fails.
> > - No cache nodes now
> > The parameters from vendor dts are likely to be wrong. It has 512
> > sets for a 32KiB L1 Cache. In this case, each set is 64B in size.
> > When the size of the cache line is 64B, it is a directly mapped
> > cache rather than a set-associative cache, the latter is commonly
> > used. Thus, I didn't use the parameters from vendor dts.
> >
> > Currently only support booting into console with only uart, other
> > features will be added soon later.
>
> Hi Yangyu,
>
> Per recent practice of cv1800b and th1520 upstream, I think a complete
> initial support would include pinctrl, clk and reset, I have received
> the complains from the community. So can you please bring the pinctrl
> clk and reset at the same time?

What sort of complaints have you got? That the support is too minimal to
be useful?

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