From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A0979C27C53 for ; Sun, 16 Jun 2024 23:59:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=rScVkTAonS8jxK9tExqIVMdx8porEJMi+vPQVdM6x+c=; b=UpNuZeb8MRVkdd +M6MWL2d5f/c74E/8AZZMLxH29xGtDCXIUud+0PDCxyMeMX/l6Kv9aR94GvZUH0aPYrGQuc0jS9UD XggFVATnVdsJy2mIFHUa1rLDLpCdNusQbua1l/olS7yH8Lf5wMZ5UNdWpQimvsEvYlCn0bMgmedUY gN/xrHBCk51P9tJbKhjloHq+LkewRfQT4MJ9O2H7MDEDMoMy5BdYLoq0XJ4+BGwq2Vh9rDrIu6sNz Dw7j+NnUXzzWiFubo2PcGc+H6GihsZFOCLgH+hBsNJJOFlmga1PcItyO+Jg5DGaQNS5dLRxALLU+q 0/1qkEPa54DWEl83NiSw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sIzlt-00000008YW8-1922; Sun, 16 Jun 2024 23:58:53 +0000 Received: from woodpecker.gentoo.org ([140.211.166.183] helo=smtp.gentoo.org) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sIzlp-00000008YUt-15dY for linux-riscv@lists.infradead.org; Sun, 16 Jun 2024 23:58:51 +0000 Date: Sun, 16 Jun 2024 23:58:29 +0000 From: Yixun Lan To: Inochi Amaoto Cc: Jisheng Zhang , Thomas Bonnefille , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Chen Wang , Chao Wei , Albert Ou , Palmer Dabbelt , Samuel Holland , Thomas Gleixner , Daniel Lezcano , Thomas Petazzoni , =?iso-8859-1?Q?Miqu=E8l?= Raynal , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org Subject: Re: [PATCH v2 1/6] riscv: dts: sophgo: Put sdhci compatible in dt of specific SoC Message-ID: <20240616235829.GA4000183@ofsar> References: <20240612-sg2002-v2-0-19a585af6846@bootlin.com> <20240612-sg2002-v2-1-19a585af6846@bootlin.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240616_165849_506466_773D6F5D X-CRM114-Status: GOOD ( 21.21 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Hi On 18:47 Wed 12 Jun , Inochi Amaoto wrote: > On Wed, Jun 12, 2024 at 10:02:31AM GMT, Thomas Bonnefille wrote: > > Remove SDHCI compatible for CV1800b from common dtsi file to put it in > > the specific dtsi file of the CV1800b. > > This commits aims at following the same guidelines as in the other nodes > > of the CV18XX family. is there any URL of guideline? or did I miss anything couldn't find any discussion about this in v1 > > > > Signed-off-by: Thomas Bonnefille > > --- > > arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 4 ++++ > > arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 1 - > > 2 files changed, 4 insertions(+), 1 deletion(-) > > > > diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi > > index ec9530972ae2..b9cd51457b4c 100644 > > --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi > > +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi > > @@ -25,3 +25,7 @@ &clint { > > &clk { > > compatible = "sophgo,cv1800-clk"; > > }; > > + > > +&sdhci0 { > > + compatible = "sophgo,cv1800b-dwcmshc"; > > +}; > > diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi > > index 891932ae470f..7247c7c3013c 100644 > > --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi > > +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi > > @@ -288,7 +288,6 @@ uart4: serial@41c0000 { > > }; > > > > sdhci0: mmc@4310000 { > > - compatible = "sophgo,cv1800b-dwcmshc"; > > reg = <0x4310000 0x1000>; > > interrupts = <36 IRQ_TYPE_LEVEL_HIGH>; > > clocks = <&clk CLK_AXI4_SD0>, > > > > -- > > 2.45.2 > > > > Hi, Jisheng, > > Is this change necessary? IIRC, the sdhci is the same across > the whole series. I tend to agree with Inochi here, if it's same across all SoC, then no bother to split, it will cause more trouble to maintain.. > > Regards, > Inochi -- Yixun Lan (dlan) Gentoo Linux Developer GPG Key ID AABEFD55 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv