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boundary="===============8493327066032721246==" Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org --===============8493327066032721246== Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="IN3S0y2QJ7kRgv7C" Content-Disposition: inline --IN3S0y2QJ7kRgv7C Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Jun 18, 2024 at 06:01:04PM +0200, Andrew Jones wrote: > On Tue, Jun 18, 2024 at 03:48:59PM GMT, Cl=E9ment L=E9ger wrote: > >=20 > >=20 > > On 26/04/2024 12:08, Andrew Jones wrote: > > > Export Zawrs ISA extension through hwprobe. > > >=20 > > > Signed-off-by: Andrew Jones > > > --- > > > Documentation/arch/riscv/hwprobe.rst | 4 ++++ > > > arch/riscv/include/uapi/asm/hwprobe.h | 1 + > > > arch/riscv/kernel/sys_hwprobe.c | 1 + > > > 3 files changed, 6 insertions(+) > > >=20 > > > diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arc= h/riscv/hwprobe.rst > > > index b2bcc9eed9aa..e072ce8285d8 100644 > > > --- a/Documentation/arch/riscv/hwprobe.rst > > > +++ b/Documentation/arch/riscv/hwprobe.rst > > > @@ -188,6 +188,10 @@ The following keys are defined: > > > manual starting from commit 95cf1f9 ("Add changes requested b= y Ved > > > during signoff") > > > =20 > > > + * :c:macro:`RISCV_HWPROBE_EXT_ZAWRS`: The Zawrs extension is suppo= rted as > > > + ratified in commit 98918c844281 ("Merge pull request #1217 fr= om > > > + riscv/zawrs") of riscv-isa-manual. > > > + > > > * :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: A bitmask that contains pe= rformance > > > information about the selected set of processors. > > > =20 > > > diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/inclu= de/uapi/asm/hwprobe.h > > > index 9f2a8e3ff204..a5fca3878a32 100644 > > > --- a/arch/riscv/include/uapi/asm/hwprobe.h > > > +++ b/arch/riscv/include/uapi/asm/hwprobe.h > > > @@ -59,6 +59,7 @@ struct riscv_hwprobe { > > > #define RISCV_HWPROBE_EXT_ZTSO (1ULL << 33) > > > #define RISCV_HWPROBE_EXT_ZACAS (1ULL << 34) > > > #define RISCV_HWPROBE_EXT_ZICOND (1ULL << 35) > > > +#define RISCV_HWPROBE_EXT_ZAWRS (1ULL << 36) > > > #define RISCV_HWPROBE_KEY_CPUPERF_0 5 > > > #define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0) > > > #define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0) > > > diff --git a/arch/riscv/kernel/sys_hwprobe.c b/arch/riscv/kernel/sys_= hwprobe.c > > > index 8cae41a502dd..b86e3531a45a 100644 > > > --- a/arch/riscv/kernel/sys_hwprobe.c > > > +++ b/arch/riscv/kernel/sys_hwprobe.c > > > @@ -111,6 +111,7 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe= *pair, > > > EXT_KEY(ZTSO); > > > EXT_KEY(ZACAS); > > > EXT_KEY(ZICOND); > > > + EXT_KEY(ZAWRS); > > > =20 > > > if (has_vector()) { > > > EXT_KEY(ZVBB); > >=20 > > AFAIU, when used in userspace, this will actually "stall" the processor > > until an interrupt/timeout happens, so the current process will keep > > occupying the processor doing nothing (up to the next interrupt/timeout) > > right ? >=20 > Yes, but of course the OS can always preempt the task as well. >=20 > >=20 > > BTW, the spec also states that "When the TW (Timeout Wait) bit in > > mstatus is set and WRS.NTO is executed in any privilege mode other than > > M mode, and it does not complete within an implementation-specific > > bounded time limit, the WRS.NTO instruction will cause an illegal > > instruction exception." so I guess the process will be killed in this c= ase ? >=20 > We don't expect mstatus.TW to be set. If it is, then wfi would likely kill > the kernel before wrs.nto gets a chance to, but one or the other will > certainly ensure usermode never gets a chance to try it :-) >=20 > We have a handful of these assumptions about how M-mode has configured > things prior to Linux starting. It'd be good if we documented them all > somewhere. Boot.rst :) If you're adding a new assumption, I think it should go there. --IN3S0y2QJ7kRgv7C Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZnG86gAKCRB4tDGHoIJi 0u/pAP0Q+XfeJlxsj+b1A0JnFsLS341SCTvQvkNkGu2FE+tTJQEAjE6tjRm5Mgdk 5DGJXtnfPCM6K7TsUvi+tfAJVUeZxgQ= =s+KC -----END PGP SIGNATURE----- --IN3S0y2QJ7kRgv7C-- --===============8493327066032721246== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv --===============8493327066032721246==--