From: Celeste Liu <coelacanthushex@gmail.com>
To: linux-riscv@lists.infradead.org, "Björn Töpel" <bjorn@rivosinc.com>
Cc: linux-kernel@vger.kernel.org, "Dmitry V . Levin" <ldv@strace.io>,
Guo Ren <guoren@kernel.org>, Palmer Dabbelt <palmer@rivosinc.com>,
Emil Renner Berthing <emil.renner.berthing@canonical.com>,
Felix Yan <felixonmars@archlinux.org>,
Ruizhe Pan <c141028@gmail.com>,
Celeste Liu <CoelacanthusHex@gmail.com>,
stable@vger.kernel.org
Subject: [PATCH v2] riscv: entry: always initialize regs->a0 to -ENOSYS
Date: Thu, 27 Jun 2024 22:23:39 +0800 [thread overview]
Message-ID: <20240627142338.5114-2-CoelacanthusHex@gmail.com> (raw)
Otherwise when the tracer changes syscall number to -1, the kernel fails
to initialize a0 with -ENOSYS and subsequently fails to return the error
code of the failed syscall to userspace. For example, it will break
strace syscall tampering.
Fixes: 52449c17bdd1 ("riscv: entry: set a0 = -ENOSYS only when syscall != -1")
Reported-by: "Dmitry V. Levin" <ldv@strace.io>
Reviewed-by: Björn Töpel <bjorn@rivosinc.com>
Cc: stable@vger.kernel.org
Signed-off-by: Celeste Liu <CoelacanthusHex@gmail.com>
---
arch/riscv/kernel/traps.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c
index 05a16b1f0aee..51ebfd23e007 100644
--- a/arch/riscv/kernel/traps.c
+++ b/arch/riscv/kernel/traps.c
@@ -319,6 +319,7 @@ void do_trap_ecall_u(struct pt_regs *regs)
regs->epc += 4;
regs->orig_a0 = regs->a0;
+ regs->a0 = -ENOSYS;
riscv_v_vstate_discard(regs);
@@ -328,8 +329,7 @@ void do_trap_ecall_u(struct pt_regs *regs)
if (syscall >= 0 && syscall < NR_syscalls)
syscall_handler(regs, syscall);
- else if (syscall != -1)
- regs->a0 = -ENOSYS;
+
/*
* Ultimately, this value will get limited by KSTACK_OFFSET_MAX(),
* so the maximum stack offset is 1k bytes (10 bits).
--
2.45.2
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next reply other threads:[~2024-06-27 14:24 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-27 14:23 Celeste Liu [this message]
2024-08-15 17:50 ` [PATCH v2] riscv: entry: always initialize regs->a0 to -ENOSYS patchwork-bot+linux-riscv
2024-09-16 16:49 ` Andrea Bolognani
2024-09-17 22:22 ` Dmitry V . Levin
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