From: Jisheng Zhang <jszhang@kernel.org>
To: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Charlie Jenkins <charlie@rivosinc.com>,
Deepak Gupta <debug@rivosinc.com>,
Clement Leger <cleger@rivosinc.com>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH v2 4/7] riscv: errata: remove ALT_INSN_FAULT and ALT_PAGE_FAULT
Date: Sun, 21 Jul 2024 01:12:29 +0800 [thread overview]
Message-ID: <20240720171232.1753-5-jszhang@kernel.org> (raw)
In-Reply-To: <20240720171232.1753-1-jszhang@kernel.org>
They are used for SIFIVE_CIP_453 errata, which has been solved by
replacing the excp_vect_table[] two entries in last commit. So these
two macros are useless now, remove them.
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
---
arch/riscv/include/asm/errata_list.h | 16 +---------------
1 file changed, 1 insertion(+), 15 deletions(-)
diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h
index 95b79afc4061..46bf00c4a57a 100644
--- a/arch/riscv/include/asm/errata_list.h
+++ b/arch/riscv/include/asm/errata_list.h
@@ -27,21 +27,7 @@
#define ERRATA_THEAD_NUMBER 2
#endif
-#ifdef __ASSEMBLY__
-
-#define ALT_INSN_FAULT(x) \
-ALTERNATIVE(__stringify(RISCV_PTR do_trap_insn_fault), \
- __stringify(RISCV_PTR sifive_cip_453_insn_fault_trp), \
- SIFIVE_VENDOR_ID, ERRATA_SIFIVE_CIP_453, \
- CONFIG_ERRATA_SIFIVE_CIP_453)
-
-#define ALT_PAGE_FAULT(x) \
-ALTERNATIVE(__stringify(RISCV_PTR do_page_fault), \
- __stringify(RISCV_PTR sifive_cip_453_page_fault_trp), \
- SIFIVE_VENDOR_ID, ERRATA_SIFIVE_CIP_453, \
- CONFIG_ERRATA_SIFIVE_CIP_453)
-#else /* !__ASSEMBLY__ */
-
+#ifndef __ASSEMBLY__
#define ALT_SFENCE_VMA_ASID(asid) \
asm(ALTERNATIVE("sfence.vma x0, %0", "sfence.vma", SIFIVE_VENDOR_ID, \
ERRATA_SIFIVE_CIP_1200, CONFIG_ERRATA_SIFIVE_CIP_1200) \
--
2.43.0
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next prev parent reply other threads:[~2024-07-20 17:27 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-20 17:12 [PATCH v2 0/7] riscv: convert bottom half of exception handling to C Jisheng Zhang
2024-07-20 17:12 ` [PATCH v2 1/7] riscv: traps: staticalize handle_break() Jisheng Zhang
2024-07-20 17:12 ` [PATCH v2 2/7] riscv: traps: remove __visible annotation Jisheng Zhang
2024-07-20 17:12 ` [PATCH v2 3/7] riscv: convert bottom half of exception handling to C Jisheng Zhang
2024-11-26 0:08 ` Deepak Gupta
2024-07-20 17:12 ` Jisheng Zhang [this message]
2024-07-20 17:12 ` [PATCH v2 5/7] riscv: errata: sifive: remove NOMMU handling Jisheng Zhang
2024-07-20 17:12 ` [PATCH v2 6/7] riscv: staticalize and remove asmlinkage from updated functions Jisheng Zhang
2024-07-20 17:12 ` [PATCH v2 7/7] riscv: traps: mark do_irq() as __always_inline Jisheng Zhang
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