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boundary="===============3796205452448567241==" Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org --===============3796205452448567241== Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="aaSee8dqcxsNdd7N" Content-Disposition: inline --aaSee8dqcxsNdd7N Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Thu, Sep 12, 2024 at 04:23:44PM -0500, Samuel Holland wrote: > Hi Valentina, >=20 > On 2024-09-12 12:00 PM, Valentina Fernandez wrote: > > Add a dt-binding for the Microchip Inter-Processor Communication (IPC) > > mailbox controller. > >=20 > > Signed-off-by: Valentina Fernandez > > --- > > .../bindings/mailbox/microchip,sbi-ipc.yaml | 115 ++++++++++++++++++ > > 1 file changed, 115 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/mailbox/microchip= ,sbi-ipc.yaml > >=20 > > diff --git a/Documentation/devicetree/bindings/mailbox/microchip,sbi-ip= c.yaml b/Documentation/devicetree/bindings/mailbox/microchip,sbi-ipc.yaml > > new file mode 100644 > > index 000000000000..dc2cbd5eb28f > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/mailbox/microchip,sbi-ipc.yaml > > @@ -0,0 +1,115 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/mailbox/microchip,sbi-ipc.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Microchip Inter-processor communication (IPC) mailbox controller > > + > > +maintainers: > > + - Valentina Fernandez > > + > > +description: > > + The Microchip Inter-processor Communication (IPC) facilitates > > + message passing between processors using an interrupt signaling > > + mechanism. > > + This SBI interface is compatible with the Mi-V Inter-hart > > + Communication (IHC) IP. > > + The microchip,sbi-ipc compatible string is inteded for use by softwa= re > > + running in supervisor privileged mode (s-mode). The SoC-specific > > + compatibles are inteded for use by the SBI implementation in machine > > + mode (m-mode). >=20 > There is a lot of conditional logic in this binding for how small it is. = Would > it make sense to split this into two separate bindings? For example, with= the > current binding microchip,ihc-chan-disabled-mask is allowed for the SBI > interface, but doesn't look like it belongs there. I dunno. Part of me says that because this is two compatibles for the same piece of hardware (the choice depending on which programming model you use) they should be documented together. The other part of me is of the opinion that they effectively describe different things, given one describes the hardware and the other describes a firmware interface that may have any sort of hardware backing it. I suppose it's more of a problem for "us" (that being me/Rob/Krzysztof) than for Valentina, and how to handle firmware interfaces to hardware like this is one of the topics that's planned for Krzysztof's devicetree BoF session at LPC. Cheers, Conor. --aaSee8dqcxsNdd7N Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZuhdaAAKCRB4tDGHoIJi 0nRJAP91xLSt5kah9UNw5BnKnaUkZ3+3+J6Hr8pnxUC12htrSgD/cf+syLKzOuLp 9r72vLZW17OTlRN+qE+FOPIrAyTZCwk= =s7P9 -----END PGP SIGNATURE----- --aaSee8dqcxsNdd7N-- --===============3796205452448567241== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv --===============3796205452448567241==--