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Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1svHAE-0000000HSwT-3hfj; Mon, 30 Sep 2024 14:14:14 +0000 Received: from nyc.source.kernel.org ([2604:1380:45d1:ec00::3]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1svGkO-0000000HN5X-3thI for linux-riscv@lists.infradead.org; Mon, 30 Sep 2024 13:47:34 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by nyc.source.kernel.org (Postfix) with ESMTP id A4189A4256E; Mon, 30 Sep 2024 13:47:23 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3A02AC4CEC7; Mon, 30 Sep 2024 13:47:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1727704051; bh=b71U8gGO5CeeJLzH8fxt8y1xLe5F5T9LsFaZJ/y1igY=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=IqvwUj9v7tMZrw9J7Q4xfkWoz6YU/RBjCoEEpimdVteecYcF0FhkmWrIjN/muaO5L g6LpsVSL9lpDvWZ3HTaJnxsvHSbForNW3xQ3Nx0DbbZ2oNAVMryF71UXB2e7p6Yn1j W2OE55trNd1EWTJ4x456+kx5/wN+nuiGZ2PR08IfSKrFsu9YgeqKGDxIiFUQY1BU0j bzcZavxQ9qb/NEE7NO8AUrpd9YKqY+XhkWXrRvMF6g8idSM637X7LmWto19hw36MBR diu1DoweoLjiO9XLoxWMtI+e2Xrss5g9i7o2F3JXG2HDI1nim3/Hxb+RCyDNBZGpUQ WkJkfVYzbw/Kg== Date: Mon, 30 Sep 2024 14:47:27 +0100 From: Conor Dooley To: pierre-henry.moussay@microchip.com Cc: Linux4Microchip@microchip.com, Conor Dooley , Daire McNamara , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [linux][PATCH v2 07/20] dt-bindings: clock: mpfs-ccc: Add PIC64GX compatibility Message-ID: <20240930-siesta-dandy-cb83076f68f2@spud> References: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> <20240930095449.1813195-8-pierre-henry.moussay@microchip.com> MIME-Version: 1.0 In-Reply-To: <20240930095449.1813195-8-pierre-henry.moussay@microchip.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240930_064733_062474_4BE797F3 X-CRM114-Status: GOOD ( 14.15 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: multipart/mixed; boundary="===============2788424647338463468==" Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org --===============2788424647338463468== Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="WZasyoaWaR6SUx82" Content-Disposition: inline --WZasyoaWaR6SUx82 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Sep 30, 2024 at 10:54:36AM +0100, pierre-henry.moussay@microchip.co= m wrote: > From: Pierre-Henry Moussay >=20 > PIC64GX SoC Clock Conditioning Circuitry is compatibles > with the Polarfire SoC >=20 > Signed-off-by: Pierre-Henry Moussay > --- > .../devicetree/bindings/clock/microchip,mpfs-ccc.yaml | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) >=20 > diff --git a/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.y= aml b/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml > index f1770360798f..9a6b50527c42 100644 > --- a/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml > +++ b/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml > @@ -17,7 +17,11 @@ description: | > =20 > properties: > compatible: > - const: microchip,mpfs-ccc > + oneOf: > + - items: > + - const: microchip,pic64gx-ccc > + - const: microchip,mpfs-ccc > + - const: microchip,mpfs-ccc Acked-by: Conor Dooley > =20 > reg: > items: > --=20 > 2.30.2 >=20 >=20 --WZasyoaWaR6SUx82 Content-Type: application/pgp-signature; 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