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[209.17.68.221]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-211057a2723sm32849345ad.178.2024.11.02.04.51.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 02 Nov 2024 04:51:18 -0700 (PDT) Date: Sat, 2 Nov 2024 20:51:17 +0900 From: Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= To: Conor Dooley Cc: linux-pci@vger.kernel.org, Conor Dooley , Daire McNamara , Lorenzo Pieralisi , Rob Herring , Bjorn Helgaas , Krzysztof Kozlowski , Conor Dooley , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: Re: [PATCH v5 0/2] PCI: microchip: support using either instance 1 or 2 Message-ID: <20241102115117.GD2260768@rocinante> References: <20240814-setback-rumbling-c6393c8f1a91@spud> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20240814-setback-rumbling-c6393c8f1a91@spud> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241102_045122_208056_429C90DA X-CRM114-Status: UNSURE ( 9.51 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Hello, > The current driver and binding for PolarFire SoC's PCI controller assume > that the root port instance in use is instance 1. The second reg > property constitutes the region encompassing both "control" and "bridge" > registers for both instances. In the driver, a fixed offset is applied to > find the base addresses for instance 1's "control" and "bridge" > registers. The BeagleV Fire uses root port instance 2, so something must > be done so that software can differentiate. This series splits the > second reg property in two, with dedicated "control" and "bridge" > entries so that either instance can be used. Applied to controller/microchip, thank you! [01/02] PCI: dt-bindings: PCI: microchip,pcie-host: Fix reg properties https://git.kernel.org/pci/pci/c/ae5ebdb405dd [02/02] PCI: microchip: Rework reg region handing to support using either instance 1 or 2 https://git.kernel.org/pci/pci/c/e071e6bd9940 Krzysztof _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv