From: Charlie Jenkins <charlie@rivosinc.com>
To: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Jesse Taube <Mr.Bossman075@gmail.com>
Cc: Palmer Dabbelt <palmer@rivosinc.com>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
Charlie Jenkins <charlie@rivosinc.com>
Subject: [PATCH for-next v2] riscv: Fix default misaligned access trap
Date: Fri, 08 Nov 2024 15:47:36 -0800 [thread overview]
Message-ID: <20241108-fix_handle_misaligned_load-v2-1-91d547ce64db@rivosinc.com> (raw)
Commit d1703dc7bc8e ("RISC-V: Detect unaligned vector accesses
supported") removed the default handlers for handle_misaligned_load()
and handle_misaligned_store(). When the kernel is compiled without
RISCV_SCALAR_MISALIGNED, these handlers are never defined, causing
compilation errors.
Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
Fixes: d1703dc7bc8e ("RISC-V: Detect unaligned vector accesses supported")
---
Changes in v2:
- Change CONFIG_RISCV_SCALAR_MISALIGNED to CONFIG_RISCV_MISALIGNED
(Jesse)
- Link to v1: https://lore.kernel.org/r/20241107-fix_handle_misaligned_load-v1-1-07d7852c9991@rivosinc.com
---
arch/riscv/include/asm/entry-common.h | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/riscv/include/asm/entry-common.h b/arch/riscv/include/asm/entry-common.h
index 7b32d2b08bb6..b28ccc6cdeea 100644
--- a/arch/riscv/include/asm/entry-common.h
+++ b/arch/riscv/include/asm/entry-common.h
@@ -25,7 +25,19 @@ static inline void arch_exit_to_user_mode_prepare(struct pt_regs *regs,
void handle_page_fault(struct pt_regs *regs);
void handle_break(struct pt_regs *regs);
+#ifdef CONFIG_RISCV_MISALIGNED
int handle_misaligned_load(struct pt_regs *regs);
int handle_misaligned_store(struct pt_regs *regs);
+#else
+static inline int handle_misaligned_load(struct pt_regs *regs)
+{
+ return -1;
+}
+
+static inline int handle_misaligned_store(struct pt_regs *regs)
+{
+ return -1;
+}
+#endif
#endif /* _ASM_RISCV_ENTRY_COMMON_H */
---
base-commit: 74741a050b79d31d8d2eeee12c77736596d0a6b2
change-id: 20241107-fix_handle_misaligned_load-8be86cb0806e
--
- Charlie
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next reply other threads:[~2024-11-09 0:22 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-08 23:47 Charlie Jenkins [this message]
2024-11-10 21:15 ` [PATCH for-next v2] riscv: Fix default misaligned access trap Jesse Taube
2024-11-13 15:12 ` patchwork-bot+linux-riscv
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