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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Mon, Nov 11, 2024 at 12:01:36PM +0800, Chen Wang wrote: > From: Chen Wang > > Add binding for Sophgo SG2042 MSI controller. > > Signed-off-by: Chen Wang > --- > .../sophgo,sg2042-msi.yaml | 78 +++++++++++++++++++ > 1 file changed, 78 insertions(+) > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml b/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml > new file mode 100644 > index 000000000000..9fe99b74c211 > --- /dev/null > +++ b/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml > @@ -0,0 +1,78 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/interrupt-controller/sophgo,sg2042-msi.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Sophgo SG2042 MSI Controller > + > +maintainers: > + - Chen Wang > + > +description: > + This interrupt controller is in Sophgo SG2042 for transforming interrupts from > + PCIe MSI to PLIC interrupts. > + > +allOf: > + - $ref: /schemas/interrupts.yaml# > + - $ref: /schemas/interrupt-controller/msi-controller.yaml# > + > +properties: > + compatible: > + const: sophgo,sg2042-msi > + > + reg: > + items: > + - description: clear register > + > + reg-names: > + items: > + - const: clr > + > + sophgo,msi-doorbell-addr: > + description: > + u64 value of the MSI doorbell address > + $ref: /schemas/types.yaml#/definitions/uint64 Why not use a 'reg' entry? In any case, this should be a translatable address (i.e. honor #address-cells/#size-cells and ranges). > + > + sophgo,msi-base-vec: > + description: > + u32 value of the base of parent PLIC vector allocated > + to MSI. > + $ref: /schemas/types.yaml#/definitions/uint32 > + minimum: 64 > + maximum: 95 > + > + sophgo,msi-num-vecs: > + description: > + u32 value of the number of parent PLIC vectors allocated > + to MSI. > + $ref: /schemas/types.yaml#/definitions/uint32 > + minimum: 1 > + maximum: 32 Use 'msi-ranges' for these. > + > + msi-controller: true > + > +required: > + - compatible > + - reg > + - reg-names > + - msi-controller > + - sophgo,msi-doorbell-addr > + - sophgo,msi-base-vec > + - sophgo,msi-num-vecs > + > +additionalProperties: true > + > +examples: > + - | > + #include > + msi: msi-controller@30000000 { > + compatible = "sophgo,sg2042-msi"; > + reg = <0x30000000 0x4>; > + reg-names = "clr"; > + msi-controller; > + sophgo,msi-doorbell-addr = <0x00000070 0x30010300>; > + sophgo,msi-base-vec = <64>; > + sophgo,msi-num-vecs = <32>; > + interrupt-parent = <&plic>; > + }; > -- > 2.34.1 > _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv