From: Charlie Jenkins <charlie@rivosinc.com>
To: Conor Dooley <conor@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Jisheng Zhang <jszhang@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Samuel Holland <samuel@sholland.org>,
Samuel Holland <samuel.holland@sifive.com>,
Jonathan Corbet <corbet@lwn.net>, Shuah Khan <shuah@kernel.org>,
Guo Ren <guoren@kernel.org>, Evan Green <evan@rivosinc.com>,
Jessica Clarke <jrtc27@jrtc27.com>,
Andrew Jones <ajones@ventanamicro.com>,
Yangyu Chen <cyy@cyyself.name>, Andy Chiu <andybnac@gmail.com>
Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev,
linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org,
Charlie Jenkins <charlie@rivosinc.com>,
Heiko Stuebner <heiko@sntech.de>,
Conor Dooley <conor.dooley@microchip.com>,
Heiko Stuebner <heiko@sntech.de>
Subject: [PATCH v11 06/14] RISC-V: define the elements of the VCSR vector CSR
Date: Wed, 13 Nov 2024 18:21:12 -0800 [thread overview]
Message-ID: <20241113-xtheadvector-v11-6-236c22791ef9@rivosinc.com> (raw)
In-Reply-To: <20241113-xtheadvector-v11-0-236c22791ef9@rivosinc.com>
From: Heiko Stuebner <heiko@sntech.de>
The VCSR CSR contains two elements VXRM[2:1] and VXSAT[0].
Define constants for those to access the elements in a readable way.
Acked-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
---
arch/riscv/include/asm/csr.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h
index fe5d4eb9adea..db1d26dfaef9 100644
--- a/arch/riscv/include/asm/csr.h
+++ b/arch/riscv/include/asm/csr.h
@@ -314,6 +314,10 @@
#define CSR_STIMECMP 0x14D
#define CSR_STIMECMPH 0x15D
+#define VCSR_VXRM_MASK 3
+#define VCSR_VXRM_SHIFT 1
+#define VCSR_VXSAT_MASK 1
+
/* Supervisor-Level Window to Indirectly Accessed Registers (AIA) */
#define CSR_SISELECT 0x150
#define CSR_SIREG 0x151
--
2.34.1
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next prev parent reply other threads:[~2024-11-14 2:21 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-14 2:21 [PATCH v11 00/14] riscv: Add support for xtheadvector Charlie Jenkins
2024-11-14 2:21 ` [PATCH v11 01/14] dt-bindings: riscv: Add xtheadvector ISA extension description Charlie Jenkins
2024-11-14 2:21 ` [PATCH v11 02/14] dt-bindings: cpus: add a thead vlen register length property Charlie Jenkins
2024-11-14 2:21 ` [PATCH v11 03/14] riscv: dts: allwinner: Add xtheadvector to the D1/D1s devicetree Charlie Jenkins
2024-11-14 2:21 ` [PATCH v11 04/14] riscv: Add thead and xtheadvector as a vendor extension Charlie Jenkins
2024-11-14 2:21 ` [PATCH v11 05/14] riscv: vector: Use vlenb from DT for thead Charlie Jenkins
2024-11-14 2:21 ` Charlie Jenkins [this message]
2024-11-14 2:21 ` [PATCH v11 07/14] riscv: csr: Add CSR encodings for CSR_VXRM/CSR_VXSAT Charlie Jenkins
2024-11-14 2:21 ` [PATCH v11 08/14] riscv: Add xtheadvector instruction definitions Charlie Jenkins
2024-11-14 2:21 ` [PATCH v11 09/14] riscv: vector: Support xtheadvector save/restore Charlie Jenkins
2024-11-14 2:21 ` [PATCH v11 10/14] riscv: hwprobe: Add thead vendor extension probing Charlie Jenkins
2024-11-14 2:44 ` Yangyu Chen
2024-11-14 3:02 ` Charlie Jenkins
2024-11-14 3:26 ` Yangyu Chen
2024-11-14 4:46 ` Charlie Jenkins
2024-11-14 6:54 ` Yangyu Chen
2024-11-14 7:23 ` Charlie Jenkins
2024-11-14 2:21 ` [PATCH v11 11/14] riscv: hwprobe: Document thead vendor extensions and xtheadvector extension Charlie Jenkins
2024-11-14 2:21 ` [PATCH v11 12/14] selftests: riscv: Fix vector tests Charlie Jenkins
2024-11-14 2:21 ` [PATCH v11 13/14] selftests: riscv: Support xtheadvector in " Charlie Jenkins
2024-11-14 2:21 ` [PATCH v11 14/14] riscv: Add ghostwrite vulnerability Charlie Jenkins
2024-11-27 9:23 ` [PATCH v11 00/14] riscv: Add support for xtheadvector Yangyu Chen
2025-01-30 14:10 ` patchwork-bot+linux-riscv
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