From: Inochi Amaoto <inochiama@gmail.com>
To: "Chen Wang" <unicorn_wang@outlook.com>,
"Jonathan Corbet" <corbet@lwn.net>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Clément Léger" <cleger@rivosinc.com>,
"Evan Green" <evan@rivosinc.com>,
"Charlie Jenkins" <charlie@rivosinc.com>,
"Andrew Jones" <ajones@ventanamicro.com>,
"Jesse Taube" <jesse@rivosinc.com>,
"Andy Chiu" <andybnac@gmail.com>,
"Alexandre Ghiti" <alexghiti@rivosinc.com>,
"Inochi Amaoto" <inochiama@gmail.com>,
"Samuel Holland" <samuel.holland@sifive.com>,
"Yong-Xuan Wang" <yongxuan.wang@sifive.com>
Cc: linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
Yixun Lan <dlan@gentoo.org>, Longbin Li <looong.bin@gmail.com>,
Conor Dooley <conor.dooley@microchip.com>
Subject: [PATCH v3 1/3] dt-bindings: riscv: add bfloat16 ISA extension description
Date: Fri, 6 Dec 2024 13:58:27 +0800 [thread overview]
Message-ID: <20241206055829.1059293-2-inochiama@gmail.com> (raw)
In-Reply-To: <20241206055829.1059293-1-inochiama@gmail.com>
Add description for the BFloat16 precision Floating-Point ISA extension,
(Zfbfmin, Zvfbfmin, Zvfbfwma). which was ratified in commit 4dc23d62
("Added Chapter title to BF16") of the riscv-isa-manual.
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
---
.../devicetree/bindings/riscv/extensions.yaml | 45 +++++++++++++++++++
1 file changed, 45 insertions(+)
diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
index 9c7dd7e75e0c..0a1f1a76d129 100644
--- a/Documentation/devicetree/bindings/riscv/extensions.yaml
+++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
@@ -329,6 +329,12 @@ properties:
instructions, as ratified in commit 056b6ff ("Zfa is ratified") of
riscv-isa-manual.
+ - const: zfbfmin
+ description:
+ The standard Zfbfmin extension which provides minimal support for
+ 16-bit half-precision brain floating-point instructions, as ratified
+ in commit 4dc23d62 ("Added Chapter title to BF16") of riscv-isa-manual.
+
- const: zfh
description:
The standard Zfh extension for 16-bit half-precision binary
@@ -525,6 +531,18 @@ properties:
in commit 6f702a2 ("Vector extensions are now ratified") of
riscv-v-spec.
+ - const: zvfbfmin
+ description:
+ The standard Zvfbfmin extension for minimal support for vectored
+ 16-bit half-precision brain floating-point instructions, as ratified
+ in commit 4dc23d62 ("Added Chapter title to BF16") of riscv-isa-manual.
+
+ - const: zvfbfwma
+ description:
+ The standard Zvfbfwma extension for vectored half-precision brain
+ floating-point widening multiply-accumulate instructions, as ratified
+ in commit 4dc23d62 ("Added Chapter title to BF16") of riscv-isa-manual.
+
- const: zvfh
description:
The standard Zvfh extension for vectored half-precision
@@ -663,6 +681,33 @@ properties:
then:
contains:
const: zca
+ # Zfbfmin depends on F
+ - if:
+ contains:
+ const: zfbfmin
+ then:
+ contains:
+ const: f
+ # Zvfbfmin depends on V or Zve32f
+ - if:
+ contains:
+ const: zvfbfmin
+ then:
+ oneOf:
+ - contains:
+ const: v
+ - contains:
+ const: zve32f
+ # Zvfbfwma depends on Zfbfmin and Zvfbfmin
+ - if:
+ contains:
+ const: zvfbfwma
+ then:
+ allOf:
+ - contains:
+ const: zfbfmin
+ - contains:
+ const: zvfbfmin
allOf:
# Zcf extension does not exist on rv64
--
2.47.1
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next prev parent reply other threads:[~2024-12-06 5:59 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-06 5:58 [PATCH v3 0/3] riscv: Add bfloat16 instruction support Inochi Amaoto
2024-12-06 5:58 ` Inochi Amaoto [this message]
2024-12-16 22:00 ` [PATCH v3 1/3] dt-bindings: riscv: add bfloat16 ISA extension description Samuel Holland
2024-12-16 22:51 ` Jessica Clarke
2024-12-19 0:36 ` Samuel Holland
2024-12-06 5:58 ` [PATCH v3 2/3] riscv: add ISA extension parsing for bfloat16 ISA extension Inochi Amaoto
2025-02-10 14:38 ` Clément Léger
2025-02-11 0:42 ` Inochi Amaoto
2025-02-11 13:45 ` Conor Dooley
2025-02-11 23:26 ` Inochi Amaoto
2024-12-06 5:58 ` [PATCH v3 3/3] riscv: hwprobe: export " Inochi Amaoto
2024-12-16 16:00 ` Yangyu Chen
2024-12-17 0:40 ` Inochi Amaoto
2024-12-17 12:11 ` Conor Dooley
2025-03-27 3:24 ` [PATCH v3 0/3] riscv: Add bfloat16 instruction support patchwork-bot+linux-riscv
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