[RFC 15/15] riscv: traps: make insn fetch common in unknown instruction

Ben Dooks
2024-12-20T15:58:25Z

Add the trapped instruction (insn) as the second argument to
riscv_v_first_use_handler() from the trap handler so when we
add more handlers we can do the fetch of the instruction just
once.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
---
- fixed wording of patch from rfc
v2:
- fixed todo by going to illegal instruction error if get_user fails
- added pointer print for failed read
- fixed issues with rebasing onto main branch
v3:
- removed print from v2
---
arch/riscv/include/asm/vector.h | 5 +++--
arch/riscv/kernel/traps.c | 13 +++++++++++--
arch/riscv/kernel/vector.c | 11 +----------
3 files changed, 15 insertions(+), 14 deletions(-)

diff --git a/arch/riscv/include/asm/vector.h b/arch/riscv/include/asm/vector.h
index be7d309cca8a..24f77a56ac57 100644
--- a/arch/riscv/include/asm/vector.h
+++ b/arch/riscv/include/asm/vector.h
@@ -21,7 +21,7 @@

extern unsigned long riscv_v_vsize;
int riscv_v_setup_vsize(void);
-bool riscv_v_first_use_handler(struct pt_regs *regs);
+bool riscv_v_first_use_handler(struct pt_regs *regs, u32 insn);
void kernel_vector_begin(void);
void kernel_vector_end(void);
void get_cpu_vector_context(void);
@@ -268,7 +268,8 @@ struct pt_regs;

static inline int riscv_v_setup_vsize(void) { return -EOPNOTSUPP; }
static __always_inline bool has_vector(void) { return false; }
-static inline bool riscv_v_first_use_handler(struct pt_regs *regs) { return false; }
+static __always_inline bool insn_is_vector(u32 insn_buf) { return false; }
+static inline bool riscv_v_first_use_handler(struct pt_regs *regs, u32 insn) { return false; }
static inline bool riscv_v_vstate_query(struct pt_regs *regs) { return false; }
static inline bool riscv_v_vstate_ctrl_user_allowed(void) { return false; }
#define riscv_v_vsize (0)
diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c
index a475fd9310fd..5ef418b0b7b2 100644
--- a/arch/riscv/kernel/traps.c
+++ b/arch/riscv/kernel/traps.c
@@ -169,17 +169,26 @@ DO_ERROR_INFO(do_trap_insn_fault,

asmlinkage __visible __trap_section void do_trap_insn_illegal(struct pt_regs *regs)
{
- bool handled;
+ bool handled = false;

if (user_mode(regs)) {
+ u32 __user *epc = (u32 __user *)regs->epc;
+ u32 insn = (u32)regs->badaddr;
+
irqentry_enter_from_user_mode(regs);

local_irq_enable();

- handled = riscv_v_first_use_handler(regs);
+ if (!insn) {
+ if (__get_user(insn, epc))
+ goto no_insn;
+ }
+
+ handled = riscv_v_first_use_handler(regs, insn);

local_irq_disable();

+ no_insn:
if (!handled)
do_trap_error(regs, SIGILL, ILL_ILLOPC, regs->epc,
"Oops - illegal instruction");
diff --git a/arch/riscv/kernel/vector.c b/arch/riscv/kernel/vector.c
index 682b3feee451..b852648cb8d5 100644
--- a/arch/riscv/kernel/vector.c
+++ b/arch/riscv/kernel/vector.c
@@ -168,11 +168,8 @@ bool riscv_v_vstate_ctrl_user_allowed(void)
}
EXPORT_SYMBOL_GPL(riscv_v_vstate_ctrl_user_allowed);

-bool riscv_v_first_use_handler(struct pt_regs *regs)
+bool riscv_v_first_use_handler(struct pt_regs *regs, u32 insn)
{
- u32 __user *epc = (u32 __user *)regs->epc;
- u32 insn = (u32)regs->badaddr;
-
if (!has_vector())
return false;

@@ -184,12 +181,6 @@ bool riscv_v_first_use_handler(struct pt_regs *regs)
if (riscv_v_vstate_query(regs))
return false;

- /* Get the instruction */
- if (!insn) {
- if (__get_user(insn, epc))
- return false;
- }
-
/* Filter out non-V instructions */
if (!insn_is_vector(insn))
return false;