[RFC 05/15] riscv: asm: use .insn for making custom instructioons

Ben Dooks
2024-12-20T15:58:22Z

Using .word breaks with big endian builds, making something which
is not a valid or worse an instruction or pair that does something
which is not intended.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
---
arch/riscv/include/asm/insn-def.h | 6 ++++++
1 file changed, 6 insertions(+)

diff --git a/arch/riscv/include/asm/insn-def.h b/arch/riscv/include/asm/insn-def.h
index 9a913010cdd9..f6dd6d963de9 100644
--- a/arch/riscv/include/asm/insn-def.h
+++ b/arch/riscv/include/asm/insn-def.h
@@ -196,8 +196,14 @@
INSN_I(OPCODE_MISC_MEM, FUNC3(2), __RD(0), \
RS1(base), SIMM12(4))

+#ifndef CONFIG_AS_HAS_INSN
#define RISCV_PAUSE ".4byte 0x100000f"
#define ZAWRS_WRS_NTO ".4byte 0x00d00073"
#define ZAWRS_WRS_STO ".4byte 0x01d00073"
+#else
+#define RISCV_PAUSE ".insn 0x100000f"
+#define ZAWRS_WRS_NTO ".insn 0x00d00073"
+#define ZAWRS_WRS_STO ".insn 0x01d00073"
+#endif

#endif /* __ASM_INSN_DEF_H */