From: Ben Dooks <ben.dooks@codethink.co.uk>
To: felix.chong@codethink.co.uk, lawrence.hunter@codethink.co.uk,
roan.richmond@codethink.co.uk, linux-riscv@lists.infradead.org
Cc: Ben Dooks <ben.dooks@codethink.co.uk>
Subject: [RFC 14/15] riscv: ftrace big endian updates
Date: Fri, 20 Dec 2024 15:58:00 +0000 [thread overview]
Message-ID: <20241220155801.1988785-15-ben.dooks@codethink.co.uk> (raw)
In-Reply-To: <20241220155801.1988785-1-ben.dooks@codethink.co.uk>
Make the ftrace code work with big endian by ensuring the
instruction stream is accessed little endian.
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
---
arch/riscv/include/asm/ftrace.h | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/riscv/include/asm/ftrace.h b/arch/riscv/include/asm/ftrace.h
index 2cddd79ff21b..233428aeab1d 100644
--- a/arch/riscv/include/asm/ftrace.h
+++ b/arch/riscv/include/asm/ftrace.h
@@ -79,7 +79,7 @@ struct dyn_arch_ftrace {
#define AUIPC_RA (0x00000097)
#define JALR_T0 (0x000282e7)
#define AUIPC_T0 (0x00000297)
-#define NOP4 (0x00000013)
+#define NOP4 (le32_to_cpu(0x00000013))
#define to_jalr_t0(offset) \
(((offset & JALR_OFFSET_MASK) << JALR_SHIFT) | JALR_T0)
@@ -93,8 +93,8 @@ struct dyn_arch_ftrace {
do { \
unsigned int offset = \
(unsigned long) callee - (unsigned long) caller; \
- call[0] = to_auipc_t0(offset); \
- call[1] = to_jalr_t0(offset); \
+ call[0] = cpu_to_le32(to_auipc_t0(offset)); \
+ call[1] = cpu_to_le32(to_jalr_t0(offset)); \
} while (0)
#define to_jalr_ra(offset) \
@@ -109,8 +109,8 @@ do { \
do { \
unsigned int offset = \
(unsigned long) callee - (unsigned long) caller; \
- call[0] = to_auipc_ra(offset); \
- call[1] = to_jalr_ra(offset); \
+ call[0] = cpu_to_le32(to_auipc_ra(offset)); \
+ call[1] = cpu_to_le32(to_jalr_ra(offset)); \
} while (0)
/*
--
2.37.2.352.g3c44437643
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next prev parent reply other threads:[~2024-12-20 15:58 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-20 15:57 RFC: riscv64 big endian system attempt Ben Dooks
2024-12-20 15:57 ` [RFC 01/15] riscv: add initial kconfig and build flags for big-endian Ben Dooks
2024-12-20 15:57 ` [RFC 02/15] add __RISCVEB__ to byteorder.h Ben Dooks
2024-12-20 15:57 ` [RFC 03/15] riscv: disable vector if big-endian, gcc unsupported option Ben Dooks
2024-12-20 15:57 ` [RFC 04/15] riscv: word-at-atime: move to generic if we're big endian Ben Dooks
2024-12-20 15:57 ` [RFC 05/15] riscv: asm: use .insn for making custom instructioons Ben Dooks
2024-12-20 15:57 ` [RFC 06/15] intiial header work Ben Dooks
2024-12-20 15:57 ` [RFC 07/15] kconfig: remove CONFIG_COMAPT for big-endian (compat cods doesn't build atm) Ben Dooks
2024-12-20 15:57 ` [RFC 08/15] defconfig: add our build config Ben Dooks
2024-12-20 15:57 ` [RFC 09/15] temp: remove various library optimisations Ben Dooks
2024-12-20 15:57 ` [RFC 10/15] riscv: fixup use of natural endian on instructions Ben Dooks
2024-12-20 15:57 ` [RFC 11/15] add todo on fpu Ben Dooks
2024-12-20 15:57 ` [RFC 12/15] riscv: bpf: big endian fixes, updated BPF_ALU ops Ben Dooks
2024-12-20 15:57 ` [RFC 13/15] riscv: probes: sort out endian-ness Ben Dooks
2024-12-20 15:58 ` Ben Dooks [this message]
2024-12-20 15:58 ` [RFC 15/15] riscv: traps: make insn fetch common in unknown instruction Ben Dooks
2024-12-20 19:53 ` RFC: riscv64 big endian system attempt Olof Johansson
2025-01-09 17:46 ` Palmer Dabbelt
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