From: E Shattow <e@freeshell.de>
To: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>
Cc: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
devicetree@vger.kernel.org, E Shattow <e@freeshell.de>
Subject: [RFC PATCH v1 0/3] riscv: dts: starfive: jh7110: More U-Boot downstream changes for JH7110
Date: Thu, 2 Jan 2025 12:41:20 -0800 [thread overview]
Message-ID: <20250102204137.423081-1-e@freeshell.de> (raw)
U-Boot boot loader has adopted using the Linux dt-rebasing tree for dts
with JH7110 VisionFive2 board target (and related JH7110 common boards).
Sync the minimum changes from jh7110.dtsi needed for boot so these can be
dropped from U-Boot.
This series of jh7110.dtsi changes is RFC as being uncertain about what is
required for boot. Testing, review, and suggestions are appreciated.
E Shattow (3):
riscv: dts: starfive: jh7110: add timer node
riscv: dts: starfive: jh7110: add DRAM memory controller node
riscv: dts: starfive: jh7110: bootph-pre-ram hinting needed by boot
loader
arch/riscv/boot/dts/starfive/jh7110.dtsi | 33 ++++++++++++++++++++++++
1 file changed, 33 insertions(+)
base-commit: 708d55db3edbe2ccf88d94b5f2e2b404bc0ba37c
--
2.45.2
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next reply other threads:[~2025-01-02 20:46 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-02 20:41 E Shattow [this message]
2025-01-02 20:41 ` [RFC PATCH v1 1/3] riscv: dts: starfive: jh7110: add timer node E Shattow
2025-01-13 18:39 ` Conor Dooley
2025-01-24 11:19 ` E Shattow
2025-01-24 16:40 ` Conor Dooley
2025-01-02 20:41 ` [RFC PATCH v1 2/3] riscv: dts: starfive: jh7110: add DRAM memory controller node E Shattow
2025-01-13 18:41 ` Conor Dooley
2025-01-02 20:41 ` [RFC PATCH v1 3/3] riscv: dts: starfive: jh7110: bootph-pre-ram hinting needed by boot loader E Shattow
2025-01-13 18:41 ` [RFC PATCH v1 0/3] riscv: dts: starfive: jh7110: More U-Boot downstream changes for JH7110 Conor Dooley
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