From: "Clément Léger" <cleger@rivosinc.com>
To: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Anup Patel <anup@brainfault.org>,
Atish Patra <atishp@atishpatra.org>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
kvm@vger.kernel.org, kvm-riscv@lists.infradead.org
Cc: "Clément Léger" <cleger@rivosinc.com>
Subject: [PATCH 6/6] RISC-V: KVM: add support for SBI_FWFT_MISALIGNED_DELEG
Date: Mon, 6 Jan 2025 16:48:43 +0100 [thread overview]
Message-ID: <20250106154847.1100344-7-cleger@rivosinc.com> (raw)
In-Reply-To: <20250106154847.1100344-1-cleger@rivosinc.com>
SBI_FWFT_MISALIGNED_DELEG needs hedeleg to be modified to delegate
misaligned load/store exceptions. Save and restore it during CPU
load/put.
Signed-off-by: Clément Léger <cleger@rivosinc.com>
---
arch/riscv/kvm/vcpu.c | 3 +++
arch/riscv/kvm/vcpu_sbi_fwft.c | 39 ++++++++++++++++++++++++++++++++++
2 files changed, 42 insertions(+)
diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
index 3420a4a62c94..bb6f788d46f5 100644
--- a/arch/riscv/kvm/vcpu.c
+++ b/arch/riscv/kvm/vcpu.c
@@ -641,6 +641,7 @@ void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
{
void *nsh;
struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr;
+ struct kvm_vcpu_config *cfg = &vcpu->arch.cfg;
vcpu->cpu = -1;
@@ -666,6 +667,7 @@ void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
csr->vstval = nacl_csr_read(nsh, CSR_VSTVAL);
csr->hvip = nacl_csr_read(nsh, CSR_HVIP);
csr->vsatp = nacl_csr_read(nsh, CSR_VSATP);
+ cfg->hedeleg = nacl_csr_read(nsh, CSR_HEDELEG);
} else {
csr->vsstatus = csr_read(CSR_VSSTATUS);
csr->vsie = csr_read(CSR_VSIE);
@@ -676,6 +678,7 @@ void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
csr->vstval = csr_read(CSR_VSTVAL);
csr->hvip = csr_read(CSR_HVIP);
csr->vsatp = csr_read(CSR_VSATP);
+ cfg->hedeleg = csr_read(CSR_HEDELEG);
}
}
diff --git a/arch/riscv/kvm/vcpu_sbi_fwft.c b/arch/riscv/kvm/vcpu_sbi_fwft.c
index 55433e805baa..1e85ff6666af 100644
--- a/arch/riscv/kvm/vcpu_sbi_fwft.c
+++ b/arch/riscv/kvm/vcpu_sbi_fwft.c
@@ -14,6 +14,8 @@
#include <asm/kvm_vcpu_sbi.h>
#include <asm/kvm_vcpu_sbi_fwft.h>
+#define MIS_DELEG (1UL << EXC_LOAD_MISALIGNED | 1UL << EXC_STORE_MISALIGNED)
+
static const enum sbi_fwft_feature_t kvm_fwft_defined_features[] = {
SBI_FWFT_MISALIGNED_EXC_DELEG,
SBI_FWFT_LANDING_PAD,
@@ -35,7 +37,44 @@ static bool kvm_fwft_is_defined_feature(enum sbi_fwft_feature_t feature)
return false;
}
+static bool kvm_sbi_fwft_misaligned_delegation_supported(struct kvm_vcpu *vcpu)
+{
+ if (!unaligned_ctl_available())
+ return false;
+
+ return true;
+}
+
+static int kvm_sbi_fwft_set_misaligned_delegation(struct kvm_vcpu *vcpu,
+ struct kvm_sbi_fwft_config *conf,
+ unsigned long value)
+{
+ if (value == 1)
+ csr_set(CSR_HEDELEG, MIS_DELEG);
+ else if (value == 0)
+ csr_clear(CSR_HEDELEG, MIS_DELEG);
+ else
+ return SBI_ERR_INVALID_PARAM;
+
+ return SBI_SUCCESS;
+}
+
+static int kvm_sbi_fwft_get_misaligned_delegation(struct kvm_vcpu *vcpu,
+ struct kvm_sbi_fwft_config *conf,
+ unsigned long *value)
+{
+ *value = (csr_read(CSR_HEDELEG) & MIS_DELEG) != 0;
+
+ return SBI_SUCCESS;
+}
+
static const struct kvm_sbi_fwft_feature features[] = {
+ {
+ .id = SBI_FWFT_MISALIGNED_EXC_DELEG,
+ .supported = kvm_sbi_fwft_misaligned_delegation_supported,
+ .set = kvm_sbi_fwft_set_misaligned_delegation,
+ .get = kvm_sbi_fwft_get_misaligned_delegation,
+ }
};
static struct kvm_sbi_fwft_config *
--
2.47.1
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next prev parent reply other threads:[~2025-01-06 15:51 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-06 15:48 [PATCH 0/6] riscv: add SBI FWFT misaligned exception delegation support Clément Léger
2025-01-06 15:48 ` [PATCH 1/6] riscv: add Firmware Feature (FWFT) SBI extensions definitions Clément Léger
2025-01-10 23:24 ` Samuel Holland
2025-01-06 15:48 ` [PATCH 2/6] riscv: request misaligned exception delegation from SBI Clément Léger
2025-01-07 3:28 ` Jesse T
2025-01-10 23:35 ` Samuel Holland
2025-01-17 15:09 ` Clément Léger
2025-01-06 15:48 ` [PATCH 3/6] RISC-V: KVM: add SBI extension init()/deinit() functions Clément Léger
2025-01-10 23:42 ` Samuel Holland
2025-01-17 15:50 ` Clément Léger
2025-01-06 15:48 ` [PATCH 4/6] RISC-V: KVM: add support for FWFT SBI extension Clément Léger
2025-01-10 23:47 ` Samuel Holland
2025-01-06 15:48 ` [PATCH 5/6] riscv: export unaligned_ctl_available() as a GPL symbol Clément Léger
2025-01-07 3:34 ` Jesse T
2025-01-06 15:48 ` Clément Léger [this message]
2025-01-10 23:55 ` [PATCH 6/6] RISC-V: KVM: add support for SBI_FWFT_MISALIGNED_DELEG Samuel Holland
2025-01-17 16:05 ` Clément Léger
2025-01-17 16:31 ` Samuel Holland
2025-01-20 8:25 ` Clément Léger
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