From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0FB47C02182 for ; Thu, 23 Jan 2025 11:31:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=nskcv2tdygJZk0NaUWHE8HtrmnI08ZLzTRXpINKQfKY=; b=g6tRuL4EkmjqfZ ntBGQPDBaNGLLZj4FjdieCJNiok97YiCAJOzsX1ovkRukmlnxTqt7ck82R1uILJsGJeJKTpDfnX6a /1Q+fSwTWDJMEohzjpZkDsScQhMixCeSpYLLcoHcPlSCT8lL7oxfvkVys/zi2OWmDe0Q5PxxpICma QoaHgPdelW0vFN8ppVMNgu60sV2NMGY/7TJLWXKhkj10BU29QIhDSuZJ4RbFbZb/FgvFGmOQbmzjA /uEh6kELMMRkv8831Dm8m0RuHM9ZAVyrwP+0CRjgp/JYf0Q71BjFkVe0WIMgWwGKiEyQuVjXDh1/S Q0tJOXf8f4iOMBjpoUtQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tavQL-0000000CKhA-3qZl; Thu, 23 Jan 2025 11:31:01 +0000 Received: from woodpecker.gentoo.org ([140.211.166.183] helo=smtp.gentoo.org) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tavQ9-0000000CKg5-1nSH for linux-riscv@lists.infradead.org; Thu, 23 Jan 2025 11:30:50 +0000 Received: from localhost (unknown [116.232.60.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: dlan) by smtp.gentoo.org (Postfix) with ESMTPSA id 3E44E3434F4; Thu, 23 Jan 2025 11:30:46 +0000 (UTC) Date: Thu, 23 Jan 2025 11:30:42 +0000 From: Yixun Lan To: Olof Johansson Subject: Re: [PATCH v4 1/4] dt-bindings: gpio: spacemit: add support for K1 SoC Message-ID: <20250123113042-GYA38135@gentoo> References: <20250121-03-k1-gpio-v4-0-4641c95c0194@gentoo.org> <20250121-03-k1-gpio-v4-1-4641c95c0194@gentoo.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250123_033049_490963_62FFDD2B X-CRM114-Status: GOOD ( 31.11 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Herring , Conor Dooley , Meng Zhang , linux-gpio@vger.kernel.org, Linus Walleij , linux-kernel@vger.kernel.org, Conor Dooley , Yangyu Chen , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, Palmer Dabbelt , Jesse Taube , Jisheng Zhang , Paul Walmsley , Inochi Amaoto , Krzysztof Kozlowski , Bartosz Golaszewski Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Hi Olof: thanks for your reivew On 12:03 Wed 22 Jan , Olof Johansson wrote: > Hi, > > On Tue, Jan 21, 2025 at 11:38:11AM +0800, Yixun Lan wrote: > > The GPIO controller of K1 support basic functions as input/output, > > all pins can be used as interrupt which route to one IRQ line, > > trigger type can be select between rising edge, failing edge, or both. > > There are four GPIO ports, each consisting of 32 pins. > > > > Signed-off-by: Yixun Lan > > --- > > .../devicetree/bindings/gpio/spacemit,k1-gpio.yaml | 116 +++++++++++++++++++++ > > 1 file changed, 116 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/gpio/spacemit,k1-gpio.yaml b/Documentation/devicetree/bindings/gpio/spacemit,k1-gpio.yaml > > new file mode 100644 > > index 0000000000000000000000000000000000000000..dd9459061aecfcba84e6a3c5052fbcddf6c61150 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/gpio/spacemit,k1-gpio.yaml > > @@ -0,0 +1,116 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/gpio/spacemit,k1-gpio.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: SpacemiT K1 GPIO controller > > + > > +maintainers: > > + - Yixun Lan > > + > > +description: > > + The controller's registers are organized as sets of eight 32-bit > > + registers with each set of port controlling 32 pins. A single > > + interrupt line is shared for all of the pins by the controller. > > + Each port will be represented as child nodes with the generic > > + GPIO-controller properties in this bindings file. > > There's only one interrupt line for all ports, but you have a binding that > duplicates them for every set of ports. That seems overly complicated, > doesn't it? They'd all bind the same handler, so there's no benefit in > providing the flexibility,. > yes, all ports share same interrupt line, but each port has its own irq related handling register, so it make sense to describe as per gpio irqchip also see comments below > > +properties: > > + $nodename: > > + pattern: "^gpio@[0-9a-f]+$" > > + > > + compatible: > > + const: spacemit,k1-gpio > > + > > + reg: > > + maxItems: 1 > > + > > + "#address-cells": > > + const: 1 > > + > > + "#size-cells": > > + const: 0 > > + > > +patternProperties: > > + "^gpio-port@[0-9a-f]+$": > > + type: object > > + properties: > > + compatible: > > + const: spacemit,k1-gpio-port > > + > > + reg: > > + maxItems: 1 > > + > > + gpio-controller: true > > + > > + "#gpio-cells": > > + const: 2 > > + > > + gpio-ranges: true > > + > > + interrupts: > > + maxItems: 1 > > + > > + interrupt-controller: true > > + > > + "#interrupt-cells": > > + const: 2 > > + description: > > + The first cell is the GPIO number, the second should specify interrupt > > + flag. The controller does not support level interrupts, so flags of > > + IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW should not be used. > > + Refer for valid flags. > > Same here, since there's no real flexibility between the banks, it might > make sense to consider a 3-cell GPIO specifier instead, and having how to handle the fourth gpio port? I would like to have uniform driver for all ports > the first cell indicate bank. I could see this argument go in either > direction, but I'm not sure I understand why to provide a gpio-controller > per bank. > IIUC, your suggestion here was same as the implementation of patch v3 of this driver[1], while combining all four ports into one irqchip, which NACKed by maintainer[2]. I tend to agree having a gpio-controller per bank provide more flexibility, easy to leverage generic gpio framework, even each port can be disabled or enabled, and IMO having shared irq handler isn't really a problem.. [1] https://lore.kernel.org/r/20241225-03-k1-gpio-v3-0-27bb7b441d62@gentoo.org [2] https://lore.kernel.org/r/CACRpkdZPD2C2iPwOX_kW1Ug8jVkdHhhc7iFycHtzj5LQ0XWNgQ@mail.gmail.com https://lore.kernel.org/r/CACRpkdYgGho=VQabonq4HccEiXBH2qM76K45oDaV1Jyi0xZ-YA@mail.gmail.com > Comparing to say Rockchip, where each bank has a separate interrupt line > -- so there the granularity makes sense. > > > -Olof -- Yixun Lan (dlan) Gentoo Linux Developer GPG Key ID AABEFD55 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv