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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Wed, Jan 15, 2025 at 02:33:23PM +0800, Chen Wang wrote: > From: Chen Wang > > Add binding for Sophgo SG2042 MSI controller. > > Signed-off-by: Chen Wang > --- > .../sophgo,sg2042-msi.yaml | 58 +++++++++++++++++++ > 1 file changed, 58 insertions(+) > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml b/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml > new file mode 100644 > index 000000000000..f641df191787 > --- /dev/null > +++ b/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml > @@ -0,0 +1,58 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/interrupt-controller/sophgo,sg2042-msi.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Sophgo SG2042 MSI Controller > + > +maintainers: > + - Chen Wang > + > +description: > + This interrupt controller is in Sophgo SG2042 for transforming interrupts from > + PCIe MSI to PLIC interrupts. > + > +allOf: > + - $ref: /schemas/interrupts.yaml# Drop this. > + - $ref: /schemas/interrupt-controller/msi-controller.yaml# > + > +properties: > + compatible: > + const: sophgo,sg2042-msi > + > + reg: > + items: > + - description: msi doorbell address > + - description: clear register > + > + reg-names: > + items: > + - const: doorbell > + - const: clr > + > + msi-controller: true > + > + msi-ranges: > + maxItems: 1 You need #msi-cells. > + > +required: > + - compatible > + - reg > + - reg-names > + - msi-controller > + - msi-ranges > + > +unevaluatedProperties: false > + > +examples: > + - | > + #include > + msi-controller@30000000 { > + compatible = "sophgo,sg2042-msi"; > + reg = <0x30000000 0x4>, <0x30000008 0x4>; > + reg-names = "doorbell", "clr"; > + msi-controller; > + msi-ranges = <&plic 64 IRQ_TYPE_LEVEL_HIGH 32>; > + interrupt-parent = <&plic>; > + }; > -- > 2.34.1 > _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv