From: Conor Dooley <conor@kernel.org>
To: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Cc: E Shattow <e@freeshell.de>,
Emil Renner Berthing <kernel@esmil.dk>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-riscv@lists.infradead.org
Subject: Re: [PATCH v2 5/5] riscv: dts: starfive: jh7110-common: bootph-pre-ram hinting needed by boot loader
Date: Wed, 5 Feb 2025 10:53:35 +0000 [thread overview]
Message-ID: <20250205-tricky-passport-b786aba90241@spud> (raw)
In-Reply-To: <CAJM55Z8oWonQBbUHPbMrVmN2HG9Dwjyr6o7L7spJQFhQfj+7Pw@mail.gmail.com>
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On Wed, Feb 05, 2025 at 02:35:42AM -0800, Emil Renner Berthing wrote:
> E Shattow wrote:
> > Add bootph-pre-ram hinting to jh7110-common.dtsi:
> > - i2c5_pins and i2c-pins subnode for connection to eeprom
> > - eeprom node
> > - qspi flash configuration subnode
> > - memory node
> > - uart0 for serial console
> >
> > With this the U-Boot SPL secondary program loader may drop such
> > overrides when using dt-rebasing with JH7110 OF_UPSTREAM board targets.
> >
> > Signed-off-by: E Shattow <e@freeshell.de>
>
> I can't find the booph-pre-ram property in any of the schemas in
> Documentation/devicetree/bindings. Does make ARCH=riscv <..> dtbs_check not
> complain about this?
They come directly from dt-schema:
https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/bootph.yaml
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prev parent reply other threads:[~2025-02-05 11:01 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-03 1:37 [PATCH v2 0/5] riscv: dts: starfive: jh7110-common: Sync downstream U-Boot changes E Shattow
2025-02-03 1:37 ` [PATCH v2 1/5] riscv: dts: starfive: jh7110-common: replace syscrg clock assignments E Shattow
2025-02-05 10:16 ` Emil Renner Berthing
2025-02-05 12:52 ` E Shattow
2025-02-07 8:31 ` Hal Feng
2025-02-09 23:33 ` E Shattow
2025-02-20 6:38 ` Hal Feng
2025-02-28 8:08 ` E Shattow
2025-02-07 12:21 ` Emil Renner Berthing
2025-02-03 1:37 ` [PATCH v2 2/5] riscv: dts: starfive: jh7110-common: qspi flash setting read-delay 2 cycles max 100MHz E Shattow
2025-02-05 10:18 ` Emil Renner Berthing
2025-02-05 13:21 ` E Shattow
2025-02-07 12:23 ` Emil Renner Berthing
2025-02-03 1:37 ` [PATCH v2 3/5] riscv: dts: starfive: jh7110-common: assign 24MHz clock-frequency to uart0 E Shattow
2025-02-05 7:23 ` Hal Feng
2025-02-05 10:29 ` Emil Renner Berthing
2025-04-23 20:18 ` E Shattow
2025-02-03 1:37 ` [PATCH v2 4/5] riscv: dts: starfive: jh7110-common: add eeprom node to i2c5 E Shattow
2025-02-05 10:33 ` Emil Renner Berthing
2025-02-03 1:37 ` [PATCH v2 5/5] riscv: dts: starfive: jh7110-common: bootph-pre-ram hinting needed by boot loader E Shattow
2025-02-05 7:57 ` Hal Feng
2025-02-05 10:01 ` Heinrich Schuchardt
2025-02-06 2:59 ` Hal Feng
2025-02-06 11:17 ` E Shattow
2025-02-07 3:01 ` Hal Feng
2025-02-28 7:53 ` E Shattow
2025-02-28 9:54 ` Maud Spierings
2025-04-24 5:15 ` E Shattow
2025-04-24 10:54 ` Heinrich Schuchardt
2025-04-24 23:37 ` E Shattow
2025-02-05 10:35 ` Emil Renner Berthing
2025-02-05 10:53 ` Conor Dooley [this message]
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