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Fri, 07 Feb 2025 10:15:12 -0800 (PST) Received: from localhost ([2a00:11b1:103b:18b0:943f:8e0:c299:6db0]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38dbde33e86sm5200577f8f.97.2025.02.07.10.15.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Feb 2025 10:15:11 -0800 (PST) Date: Fri, 7 Feb 2025 19:15:08 +0100 From: Andrew Jones To: =?utf-8?B?Q2zDqW1lbnQgTMOpZ2Vy?= Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, paul.walmsley@sifive.com, palmer@dabbelt.com, charlie@rivosinc.com, jesse@rivosinc.com, Anup Patel Subject: Re: [PATCH 6/9] riscv: Fix set up of vector cpu hotplug callback Message-ID: <20250207-7d43933438bb9a5a2d6002d0@orel> References: <20250207161939.46139-11-ajones@ventanamicro.com> <20250207161939.46139-17-ajones@ventanamicro.com> <00cbde9c-39b4-4445-98af-70dfd1fbd62a@rivosinc.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <00cbde9c-39b4-4445-98af-70dfd1fbd62a@rivosinc.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250207_101514_134368_76E7BF40 X-CRM114-Status: GOOD ( 26.39 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Fri, Feb 07, 2025 at 06:36:28PM +0100, Cl=E9ment L=E9ger wrote: > = > = > On 07/02/2025 17:19, Andrew Jones wrote: > > Whether or not we have RISCV_PROBE_VECTOR_UNALIGNED_ACCESS we need to > > set up a cpu hotplug callback to check if we have vector at all, > > since, when we don't have vector, we need to set > > vector_misaligned_access to unsupported rather than leave it the > > default of unknown. > > = > > Fixes: e7c9d66e313b ("RISC-V: Report vector unaligned access speed hwpr= obe") > > Signed-off-by: Andrew Jones > > --- > > arch/riscv/kernel/unaligned_access_speed.c | 31 +++++++++++----------- > > 1 file changed, 16 insertions(+), 15 deletions(-) > > = > > diff --git a/arch/riscv/kernel/unaligned_access_speed.c b/arch/riscv/ke= rnel/unaligned_access_speed.c > > index c9d3237649bb..d9d4ca1fadc7 100644 > > --- a/arch/riscv/kernel/unaligned_access_speed.c > > +++ b/arch/riscv/kernel/unaligned_access_speed.c > > @@ -356,6 +356,20 @@ static void check_vector_unaligned_access(struct w= ork_struct *work __always_unus > > per_cpu(vector_misaligned_access, cpu) =3D speed; > > } > > = > > +/* Measure unaligned access speed on all CPUs present at boot in paral= lel. */ > > +static int __init vec_check_unaligned_access_speed_all_cpus(void *unus= ed __always_unused) > > +{ > > + schedule_on_each_cpu(check_vector_unaligned_access); > Hey Andrew, > = > While at it, could you add a comment stating that schedule_on_cpu() > (while documented as really slow) is used due to kernel_vector_begin() > needing interrupts to be enabled ? I stumbled upon that while reworking > misaligned. That should be a separate patch, since this patch is mostly just moving code (not even this function was "moved", but git-diff prefers to say it was moved rather than what was actually moved...) I guess the comment patch you suggest should go in your rework series. Thanks, drew > = > Thanks, > = > Cl=E9ment > = > > + > > + return 0; > > +} > > +#else /* CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS */ > > +static int __init vec_check_unaligned_access_speed_all_cpus(void *unus= ed __always_unused) > > +{ > > + return 0; > > +} > > +#endif > > + > > static int riscv_online_cpu_vec(unsigned int cpu) > > { > > if (!has_vector()) { > > @@ -363,27 +377,16 @@ static int riscv_online_cpu_vec(unsigned int cpu) > > return 0; > > } > > = > > +#ifdef CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS > > if (per_cpu(vector_misaligned_access, cpu) !=3D RISCV_HWPROBE_MISALIG= NED_VECTOR_UNKNOWN) > > return 0; > > = > > check_vector_unaligned_access_emulated(NULL); > > check_vector_unaligned_access(NULL); > > - return 0; > > -} > > - > > -/* Measure unaligned access speed on all CPUs present at boot in paral= lel. */ > > -static int __init vec_check_unaligned_access_speed_all_cpus(void *unus= ed __always_unused) > > -{ > > - schedule_on_each_cpu(check_vector_unaligned_access); > > +#endif > > = > > return 0; > > } > > -#else /* CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS */ > > -static int __init vec_check_unaligned_access_speed_all_cpus(void *unus= ed __always_unused) > > -{ > > - return 0; > > -} > > -#endif > > = > > static int __init check_unaligned_access_all_cpus(void) > > { > > @@ -409,10 +412,8 @@ static int __init check_unaligned_access_all_cpus(= void) > > cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, "riscv:online", > > riscv_online_cpu, riscv_offline_cpu); > > #endif > > -#ifdef CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS > > cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, "riscv:online", > > riscv_online_cpu_vec, NULL); > > -#endif > > = > > return 0; > > } > = _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv