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Fri, 07 Feb 2025 10:19:39 -0800 (PST) Received: from localhost ([2a00:11b1:103b:18b0:943f:8e0:c299:6db0]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38dcdb54668sm1806478f8f.35.2025.02.07.10.19.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Feb 2025 10:19:39 -0800 (PST) Date: Fri, 7 Feb 2025 19:19:35 +0100 From: Andrew Jones To: linux-riscv@lists.infradead.org Cc: cleger@rivosinc.com Subject: Re: [PATCH 8/9] riscv: Implement check_unaligned_access_table Message-ID: <20250207-ed32c2f6c418ba86ca82d455@orel> References: <20250207161939.46139-11-ajones@ventanamicro.com> <20250207181048.6045-2-ajones@ventanamicro.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20250207181048.6045-2-ajones@ventanamicro.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250207_181942_137533_DF4866AE X-CRM114-Status: GOOD ( 26.60 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org This is the same as the other 8/9 (for those of you that received it). For whatever reason, the linux-riscv mailing list dropped the original 8/9, though, so I've sent it again. Thanks, drew On Fri, Feb 07, 2025 at 07:10:49PM +0100, Andrew Jones wrote: > Define the table entry type and implement the table lookup to find > unaligned access types by id registers which is used to skip probing. > > Signed-off-by: Andrew Jones > --- > arch/riscv/kernel/unaligned_access_speed.c | 91 +++++++++++++++++++++- > 1 file changed, 89 insertions(+), 2 deletions(-) > > diff --git a/arch/riscv/kernel/unaligned_access_speed.c b/arch/riscv/kernel/unaligned_access_speed.c > index f8497097e79d..bd6db4c42daf 100644 > --- a/arch/riscv/kernel/unaligned_access_speed.c > +++ b/arch/riscv/kernel/unaligned_access_speed.c > @@ -12,6 +12,7 @@ > #include > #include > #include > +#include > #include > > #include "copy-unaligned.h" > @@ -230,11 +231,89 @@ static int __init lock_and_set_unaligned_access_static_branch(void) > > arch_initcall_sync(lock_and_set_unaligned_access_static_branch); > > -static bool check_unaligned_access_table(void) > +/* > + * An unaligned_access_table_entry maps harts (or collections of harts) to > + * unaligned access types. @level is used to determine whether @marchid and/or > + * @mimpid should to be considered. All (level, mvendorid, marchid, mimpid) > + * tuples formed from each table entry must be unique. > + */ > +enum id_level { > + LEVEL_VENDOR, > + LEVEL_ARCH, > + LEVEL_IMP, > +}; > +struct unaligned_access_table_entry { > + enum id_level level; > + u32 mvendorid; > + ulong marchid; > + ulong mimpid; > + long type; > +}; > + > +static struct unaligned_access_table_entry unaligned_access_table_entries[] = { > +}; > + > +/* > + * Search unaligned_access_table_entries[] for the most specific match, > + * i.e. if there are two entries, one with mvendorid = V and level = VENDOR > + * and another with mvendorid = V, level = ARCH, and marchid = A, then > + * a hart with {V,A,?} will match the latter while a hart with {V,!A,?} > + * will match the former. > + */ > +static bool __check_unaligned_access_table(int cpu, long *ptr, int nr_entries, > + struct unaligned_access_table_entry table[]) > { > + struct unaligned_access_table_entry *entry, *match = NULL; > + u32 mvendorid = riscv_cached_mvendorid(cpu); > + ulong marchid = riscv_cached_marchid(cpu); > + ulong mimpid = riscv_cached_mimpid(cpu); > + int i; > + > + for (i = 0; i < nr_entries; ++i) { > + entry = &table[i]; > + > + switch (entry->level) { > + case LEVEL_VENDOR: > + if (!match && entry->mvendorid == mvendorid) { > + /* The match, unless we find an ARCH or IMP level match. */ > + match = entry; > + } > + break; > + case LEVEL_ARCH: > + if (entry->mvendorid == mvendorid && entry->marchid == marchid) { > + /* The match, unless we find an IMP level match. */ > + match = entry; > + } > + break; > + case LEVEL_IMP: > + if (entry->mvendorid == mvendorid && entry->marchid == marchid && > + entry->mimpid == mimpid) { > + match = entry; > + goto matched; > + } > + break; > + } > + } > + > + if (match) { > +matched: > + *ptr = match->type; > + return true; > + } > + > return false; > } > > +static bool check_unaligned_access_table(void) > +{ > + int cpu = smp_processor_id(); > + long *ptr = per_cpu_ptr(&misaligned_access_speed, cpu); > + > + return __check_unaligned_access_table(cpu, ptr, > + ARRAY_SIZE(unaligned_access_table_entries), > + unaligned_access_table_entries); > +} > + > static int riscv_online_cpu(unsigned int cpu) > { > if (check_unaligned_access_table()) > @@ -380,9 +459,17 @@ static int __init vec_check_unaligned_access_speed_all_cpus(void *unused __alway > } > #endif > > +static struct unaligned_access_table_entry vec_unaligned_access_table_entries[] = { > +}; > + > static bool check_vector_unaligned_access_table(void) > { > - return false; > + int cpu = smp_processor_id(); > + long *ptr = per_cpu_ptr(&vector_misaligned_access, cpu); > + > + return __check_unaligned_access_table(cpu, ptr, > + ARRAY_SIZE(vec_unaligned_access_table_entries), > + vec_unaligned_access_table_entries); > } > > static int riscv_online_cpu_vec(unsigned int cpu) > -- > 2.48.1 > _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv