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Thu, 13 Mar 2025 08:23:15 -0700 (PDT) Received: from localhost ([2a02:8308:a00c:e200::59a5]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-395c8975b34sm2457776f8f.55.2025.03.13.08.23.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Mar 2025 08:23:14 -0700 (PDT) Date: Thu, 13 Mar 2025 16:23:13 +0100 From: Andrew Jones To: =?utf-8?B?Q2zDqW1lbnQgTMOpZ2Vy?= Cc: Paul Walmsley , Palmer Dabbelt , Anup Patel , Atish Patra , Shuah Khan , Jonathan Corbet , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org, Samuel Holland , Deepak Gupta Subject: Re: [PATCH v3 17/17] RISC-V: KVM: add support for SBI_FWFT_MISALIGNED_DELEG Message-ID: <20250313-16176e19c15b63a156cb534c@orel> References: <20250310151229.2365992-1-cleger@rivosinc.com> <20250310151229.2365992-18-cleger@rivosinc.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20250310151229.2365992-18-cleger@rivosinc.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250313_082316_835706_46016389 X-CRM114-Status: GOOD ( 19.44 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Mon, Mar 10, 2025 at 04:12:24PM +0100, Cl=E9ment L=E9ger wrote: > SBI_FWFT_MISALIGNED_DELEG needs hedeleg to be modified to delegate > misaligned load/store exceptions. Save and restore it during CPU > load/put. > = > Signed-off-by: Cl=E9ment L=E9ger > Reviewed-by: Deepak Gupta > --- > arch/riscv/kvm/vcpu.c | 3 +++ > arch/riscv/kvm/vcpu_sbi_fwft.c | 39 ++++++++++++++++++++++++++++++++++ > 2 files changed, 42 insertions(+) > = > diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c > index 542747e2c7f5..d98e379945c3 100644 > --- a/arch/riscv/kvm/vcpu.c > +++ b/arch/riscv/kvm/vcpu.c > @@ -646,6 +646,7 @@ void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu) > { > void *nsh; > struct kvm_vcpu_csr *csr =3D &vcpu->arch.guest_csr; > + struct kvm_vcpu_config *cfg =3D &vcpu->arch.cfg; > = > vcpu->cpu =3D -1; > = > @@ -671,6 +672,7 @@ void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu) > csr->vstval =3D nacl_csr_read(nsh, CSR_VSTVAL); > csr->hvip =3D nacl_csr_read(nsh, CSR_HVIP); > csr->vsatp =3D nacl_csr_read(nsh, CSR_VSATP); > + cfg->hedeleg =3D nacl_csr_read(nsh, CSR_HEDELEG); > } else { > csr->vsstatus =3D csr_read(CSR_VSSTATUS); > csr->vsie =3D csr_read(CSR_VSIE); > @@ -681,6 +683,7 @@ void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu) > csr->vstval =3D csr_read(CSR_VSTVAL); > csr->hvip =3D csr_read(CSR_HVIP); > csr->vsatp =3D csr_read(CSR_VSATP); > + cfg->hedeleg =3D csr_read(CSR_HEDELEG); > } > } > = > diff --git a/arch/riscv/kvm/vcpu_sbi_fwft.c b/arch/riscv/kvm/vcpu_sbi_fwf= t.c > index cce1e41d5490..756fda1cf2e7 100644 > --- a/arch/riscv/kvm/vcpu_sbi_fwft.c > +++ b/arch/riscv/kvm/vcpu_sbi_fwft.c > @@ -14,6 +14,8 @@ > #include > #include > = > +#define MIS_DELEG (BIT_ULL(EXC_LOAD_MISALIGNED) | BIT_ULL(EXC_STORE_MISA= LIGNED)) > + > struct kvm_sbi_fwft_feature { > /** > * @id: Feature ID > @@ -64,7 +66,44 @@ static bool kvm_fwft_is_defined_feature(enum sbi_fwft_= feature_t feature) > return false; > } > = > +static bool kvm_sbi_fwft_misaligned_delegation_supported(struct kvm_vcpu= *vcpu) > +{ > + if (!misaligned_traps_can_delegate()) > + return false; > + > + return true; Just return misaligned_traps_can_delegate(); > +} > + > +static int kvm_sbi_fwft_set_misaligned_delegation(struct kvm_vcpu *vcpu, > + struct kvm_sbi_fwft_config *conf, > + unsigned long value) > +{ > + if (value =3D=3D 1) > + csr_set(CSR_HEDELEG, MIS_DELEG); > + else if (value =3D=3D 0) > + csr_clear(CSR_HEDELEG, MIS_DELEG); > + else > + return SBI_ERR_INVALID_PARAM; > + > + return SBI_SUCCESS; > +} > + > +static int kvm_sbi_fwft_get_misaligned_delegation(struct kvm_vcpu *vcpu, > + struct kvm_sbi_fwft_config *conf, > + unsigned long *value) > +{ > + *value =3D (csr_read(CSR_HEDELEG) & MIS_DELEG) !=3D 0; > + > + return SBI_SUCCESS; > +} > + > static const struct kvm_sbi_fwft_feature features[] =3D { > + { > + .id =3D SBI_FWFT_MISALIGNED_EXC_DELEG, > + .supported =3D kvm_sbi_fwft_misaligned_delegation_supported, > + .set =3D kvm_sbi_fwft_set_misaligned_delegation, > + .get =3D kvm_sbi_fwft_get_misaligned_delegation, > + }, > }; > = > static struct kvm_sbi_fwft_config * > -- = > 2.47.2 > Reviewed-by: Andrew Jones _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv