From: "Clément Léger" <cleger@rivosinc.com>
To: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Anup Patel <anup@brainfault.org>,
Atish Patra <atishp@atishpatra.org>,
Shuah Khan <shuah@kernel.org>, Jonathan Corbet <corbet@lwn.net>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-doc@vger.kernel.org, kvm@vger.kernel.org,
kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org
Cc: "Clément Léger" <cleger@rivosinc.com>,
"Samuel Holland" <samuel.holland@sifive.com>,
"Andrew Jones" <ajones@ventanamicro.com>
Subject: [PATCH v4 08/18] riscv: misaligned: move emulated access uniformity check in a function
Date: Mon, 17 Mar 2025 18:06:14 +0100 [thread overview]
Message-ID: <20250317170625.1142870-9-cleger@rivosinc.com> (raw)
In-Reply-To: <20250317170625.1142870-1-cleger@rivosinc.com>
Split the code that check for the uniformity of misaligned accesses
performance on all cpus from check_unaligned_access_emulated_all_cpus()
to its own function which will be used for delegation check. No
functional changes intended.
Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
arch/riscv/kernel/traps_misaligned.c | 18 +++++++++++++-----
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/arch/riscv/kernel/traps_misaligned.c b/arch/riscv/kernel/traps_misaligned.c
index 8175b3449b73..3c77fc78fe4f 100644
--- a/arch/riscv/kernel/traps_misaligned.c
+++ b/arch/riscv/kernel/traps_misaligned.c
@@ -672,10 +672,20 @@ static int cpu_online_check_unaligned_access_emulated(unsigned int cpu)
return 0;
}
-bool check_unaligned_access_emulated_all_cpus(void)
+static bool all_cpus_unaligned_scalar_access_emulated(void)
{
int cpu;
+ for_each_online_cpu(cpu)
+ if (per_cpu(misaligned_access_speed, cpu) !=
+ RISCV_HWPROBE_MISALIGNED_SCALAR_EMULATED)
+ return false;
+
+ return true;
+}
+
+bool check_unaligned_access_emulated_all_cpus(void)
+{
/*
* We can only support PR_UNALIGN controls if all CPUs have misaligned
* accesses emulated since tasks requesting such control can run on any
@@ -683,10 +693,8 @@ bool check_unaligned_access_emulated_all_cpus(void)
*/
on_each_cpu(check_unaligned_access_emulated, NULL, 1);
- for_each_online_cpu(cpu)
- if (per_cpu(misaligned_access_speed, cpu)
- != RISCV_HWPROBE_MISALIGNED_SCALAR_EMULATED)
- return false;
+ if (!all_cpus_unaligned_scalar_access_emulated())
+ return false;
unaligned_ctl = true;
return true;
--
2.47.2
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next prev parent reply other threads:[~2025-03-17 17:13 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-17 17:06 [PATCH v4 00/18] riscv: add SBI FWFT misaligned exception delegation support Clément Léger
2025-03-17 17:06 ` [PATCH v4 01/18] riscv: add Firmware Feature (FWFT) SBI extensions definitions Clément Léger
2025-03-17 17:06 ` [PATCH v4 02/18] riscv: sbi: add new SBI error mappings Clément Léger
2025-03-22 12:06 ` Andrew Jones
2025-03-24 8:29 ` Clément Léger
2025-03-24 8:38 ` Andrew Jones
2025-03-24 8:40 ` Clément Léger
2025-03-17 17:06 ` [PATCH v4 03/18] riscv: sbi: add FWFT extension interface Clément Léger
2025-03-22 12:11 ` Andrew Jones
2025-03-17 17:06 ` [PATCH v4 04/18] riscv: sbi: add SBI FWFT extension calls Clément Léger
2025-03-22 12:14 ` Andrew Jones
2025-03-24 8:37 ` Clément Léger
2025-03-17 17:06 ` [PATCH v4 05/18] riscv: misaligned: request misaligned exception from SBI Clément Léger
2025-03-17 17:06 ` [PATCH v4 06/18] riscv: misaligned: use on_each_cpu() for scalar misaligned access probing Clément Léger
2025-03-17 17:06 ` [PATCH v4 07/18] riscv: misaligned: use correct CONFIG_ ifdef for misaligned_access_speed Clément Léger
2025-03-17 17:06 ` Clément Léger [this message]
2025-03-17 17:06 ` [PATCH v4 09/18] riscv: misaligned: add a function to check misalign trap delegability Clément Léger
2025-03-17 17:06 ` [PATCH v4 10/18] riscv: misaligned: factorize trap handling Clément Léger
2025-03-17 17:06 ` [PATCH v4 11/18] riscv: misaligned: enable IRQs while handling misaligned accesses Clément Léger
2025-03-17 17:06 ` [PATCH v4 12/18] riscv: misaligned: use get_user() instead of __get_user() Clément Léger
2025-03-17 17:06 ` [PATCH v4 13/18] Documentation/sysctl: add riscv to unaligned-trap supported archs Clément Léger
2025-03-17 17:06 ` [PATCH v4 14/18] selftests: riscv: add misaligned access testing Clément Léger
2025-03-17 17:06 ` [PATCH v4 15/18] RISC-V: KVM: add SBI extension init()/deinit() functions Clément Léger
2025-03-22 12:23 ` Andrew Jones
2025-03-17 17:06 ` [PATCH v4 16/18] RISC-V: KVM: add SBI extension reset callback Clément Léger
2025-03-17 17:06 ` [PATCH v4 17/18] RISC-V: KVM: add support for FWFT SBI extension Clément Léger
2025-03-22 12:30 ` Andrew Jones
2025-03-17 17:06 ` [PATCH v4 18/18] RISC-V: KVM: add support for SBI_FWFT_MISALIGNED_DELEG Clément Léger
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