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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Mon, Apr 07, 2025 at 02:35:12PM +0800, Zixian Zeng wrote: > add compatible property to include "sophgo,sg2042-spi" for > the SOPHGO SG2042 SoC SPI Controller. > > Signed-off-by: Zixian Zeng > --- > Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml > index bccd00a1ddd0ad92b437eed5b525a6ea1963db57..94102d94ed5dffe889a8a11c1c637d466713c208 100644 > --- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml > +++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml > @@ -88,6 +88,10 @@ properties: > - renesas,r9a06g032-spi # RZ/N1D > - renesas,r9a06g033-spi # RZ/N1S > - const: renesas,rzn1-spi # RZ/N1 > + - description: SOPHGO SG2042 SoC SPI Controller > + items: > + - const: sophgo,sg2042-spi > + - const: snps,dw-apb-ssi This and all the other cases with snps,dw-apb-ssi fallback should be combined into 1 entry. > - description: T-HEAD TH1520 SoC SPI Controller > items: > - const: thead,th1520-spi > > -- > 2.49.0 > _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv