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Sun, 13 Apr 2025 15:35:50 -0700 (PDT) Received: from localhost ([2001:da8:7001:11::cb]) by smtp.gmail.com with UTF8SMTPSA id af79cd13be357-7c7a8942eb8sm617762685a.12.2025.04.13.15.35.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 13 Apr 2025 15:35:50 -0700 (PDT) From: Inochi Amaoto To: Jean Delvare , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen Wang , Inochi Amaoto , Andi Shyti , Thomas Gleixner , Paul Walmsley , Samuel Holland , Ulf Hansson , Philipp Zabel , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Daniel Lezcano , Thomas Bonnefille , Jarkko Nikula , Jisheng Zhang , Chao Wei Cc: linux-hwmon@vger.kernel.org, devicetree@vger.kernel.org, sophgo@lists.linux.dev, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-riscv@lists.infradead.org, linux-mmc@vger.kernel.org, Yixun Lan , Longbin Li Subject: [PATCH v2 00/10] riscv: sophgo: Introduce SG2044 SRD3-10 board support Date: Mon, 14 Apr 2025 06:34:54 +0800 Message-ID: <20250413223507.46480-1-inochiama@gmail.com> X-Mailer: git-send-email 2.49.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250413_153552_211862_E826AD84 X-CRM114-Status: GOOD ( 10.92 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Sophgo SG2044 SRD3-10 is an ATX board bases on Sophgo SG2044 SoC. This board includes 5 uart ports, 5 pcie x8 slots, 1 1G Ethernet port, 1 microSD slot. Introduce basic support for this board and Sophgo SG2044 SoC Changed from v1: - https://lore.kernel.org/all/20250407010616.749833-1-inochiama@gmail.com 1. apply Rob's tag 2. patch 1: new patch for grouping all similar compatible ids. 3. patch 7: remove unnecessary compatible check 4. patch 8: adapt for the new patch 1 5. patch 9: fix copyright e-mail Inochi Amaoto (10): dt-bindings: i2c: dw: merge duplicate compatible entry. dt-bindings: timer: Add Sophgo SG2044 ACLINT timer dt-bindings: interrupt-controller: Add Sophgo SG2044 CLINT mswi dt-bindings: interrupt-controller: Add Sophgo SG2044 PLIC dt-bindings: reset: sophgo: Add SG2044 bindings. dt-bindings: hwmon: Add Sophgo SG2044 external hardware monitor support dt-bindings: mmc: sdhci-of-dwcmhsc: Add Sophgo SG2044 support dt-bindings: i2c: dw: Add Sophgo SG2044 SoC I2C controller dt-bindings: riscv: sophgo: Add SG2044 compatible string riscv: dts: sophgo: Add initial device tree of Sophgo SRD3-10 .../hwmon/sophgo,sg2042-hwmon-mcu.yaml | 6 +- .../bindings/i2c/snps,designware-i2c.yaml | 12 +- .../sifive,plic-1.0.0.yaml | 1 + .../thead,c900-aclint-mswi.yaml | 1 + .../bindings/mmc/snps,dwcmshc-sdhci.yaml | 3 + .../bindings/reset/sophgo,sg2042-reset.yaml | 7 +- .../devicetree/bindings/riscv/sophgo.yaml | 4 + .../timer/thead,c900-aclint-mtimer.yaml | 1 + arch/riscv/boot/dts/sophgo/Makefile | 1 + arch/riscv/boot/dts/sophgo/sg2044-cpus.dtsi | 3002 +++++++++++++++++ arch/riscv/boot/dts/sophgo/sg2044-reset.h | 128 + .../boot/dts/sophgo/sg2044-sophgo-srd3-10.dts | 32 + arch/riscv/boot/dts/sophgo/sg2044.dtsi | 86 + 13 files changed, 3275 insertions(+), 9 deletions(-) create mode 100644 arch/riscv/boot/dts/sophgo/sg2044-cpus.dtsi create mode 100644 arch/riscv/boot/dts/sophgo/sg2044-reset.h create mode 100644 arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts create mode 100644 arch/riscv/boot/dts/sophgo/sg2044.dtsi -- 2.49.0 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv