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Thu, 24 Apr 2025 03:35:42 -0700 (PDT) Received: from localhost ([2a02:8308:a00c:e200::f716]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3a06d4c30ccsm1653633f8f.49.2025.04.24.03.35.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Apr 2025 03:35:42 -0700 (PDT) Date: Thu, 24 Apr 2025 12:35:41 +0200 From: Andrew Jones To: Alexandre Ghiti Cc: Paul Walmsley , Palmer Dabbelt , Alexandre Ghiti , Anup Patel , Atish Patra , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org Subject: Re: [PATCH 1/3] riscv: Fix typo EXRACT -> EXTRACT Message-ID: <20250424-93c64fdbb15c142ee458d857@orel> References: <20250422082545.450453-1-alexghiti@rivosinc.com> <20250422082545.450453-2-alexghiti@rivosinc.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20250422082545.450453-2-alexghiti@rivosinc.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250424_033544_803057_0D97452B X-CRM114-Status: GOOD ( 14.13 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Tue, Apr 22, 2025 at 10:25:43AM +0200, Alexandre Ghiti wrote: > Simply fix a typo. > > Signed-off-by: Alexandre Ghiti > --- > arch/riscv/include/asm/insn.h | 2 +- > arch/riscv/kernel/vector.c | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/riscv/include/asm/insn.h b/arch/riscv/include/asm/insn.h > index 09fde95a5e8f..2a589a58b291 100644 > --- a/arch/riscv/include/asm/insn.h > +++ b/arch/riscv/include/asm/insn.h > @@ -352,7 +352,7 @@ static __always_inline bool riscv_insn_is_c_jalr(u32 code) > ({typeof(x) x_ = (x); RV_X(x_, RVFDQ_FL_FS_WIDTH_OFF, \ > RVFDQ_FL_FS_WIDTH_MASK); }) > > -#define RVV_EXRACT_VL_VS_WIDTH(x) RVFDQ_EXTRACT_FL_FS_WIDTH(x) > +#define RVV_EXTRACT_VL_VS_WIDTH(x) RVFDQ_EXTRACT_FL_FS_WIDTH(x) > > /* > * Get the immediate from a J-type instruction. > diff --git a/arch/riscv/kernel/vector.c b/arch/riscv/kernel/vector.c > index 184f780c932d..901e67adf576 100644 > --- a/arch/riscv/kernel/vector.c > +++ b/arch/riscv/kernel/vector.c > @@ -93,7 +93,7 @@ bool insn_is_vector(u32 insn_buf) > return true; > case RVV_OPCODE_VL: > case RVV_OPCODE_VS: > - width = RVV_EXRACT_VL_VS_WIDTH(insn_buf); > + width = RVV_EXTRACT_VL_VS_WIDTH(insn_buf); > if (width == RVV_VL_VS_WIDTH_8 || width == RVV_VL_VS_WIDTH_16 || > width == RVV_VL_VS_WIDTH_32 || width == RVV_VL_VS_WIDTH_64) > return true; > -- > 2.39.2 > Reviewed-by: Andrew Jones _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv