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Fri, 25 Apr 2025 00:26:34 -0700 (PDT) Received: from localhost ([2a02:8308:a00c:e200::f716]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4409d2aab65sm46521075e9.17.2025.04.25.00.26.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Apr 2025 00:26:34 -0700 (PDT) Date: Fri, 25 Apr 2025 09:26:33 +0200 From: Andrew Jones To: Alexandre Ghiti Cc: Paul Walmsley , Palmer Dabbelt , Alexandre Ghiti , Anup Patel , Atish Patra , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org Subject: Re: [PATCH 2/3] riscv: Strengthen duplicate and inconsistent definition of RV_X() Message-ID: <20250425-93c9f462a1980ebd7bbc515d@orel> References: <20250422082545.450453-1-alexghiti@rivosinc.com> <20250422082545.450453-3-alexghiti@rivosinc.com> <20250424-f322adab22126ae97dd7c5b4@orel> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20250424-f322adab22126ae97dd7c5b4@orel> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250425_002636_623145_D92D61BD X-CRM114-Status: GOOD ( 15.07 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Thu, Apr 24, 2025 at 10:45:46AM +0200, Andrew Jones wrote: > On Tue, Apr 22, 2025 at 10:25:44AM +0200, Alexandre Ghiti wrote: > > RV_X() macro is defined in two different ways which is error prone. > > > > So harmonize its first definition and add another macro RV_X_mask() for > > the second one. > > > > Signed-off-by: Alexandre Ghiti > > --- > > arch/riscv/include/asm/insn.h | 39 ++++++++++++++-------------- > > arch/riscv/kernel/elf_kexec.c | 1 - > > arch/riscv/kernel/traps_misaligned.c | 1 - > > arch/riscv/kvm/vcpu_insn.c | 1 - > > 4 files changed, 20 insertions(+), 22 deletions(-) > > > > diff --git a/arch/riscv/include/asm/insn.h b/arch/riscv/include/asm/insn.h > > index 2a589a58b291..4063ca35be9b 100644 > > --- a/arch/riscv/include/asm/insn.h > > +++ b/arch/riscv/include/asm/insn.h > > @@ -288,43 +288,44 @@ static __always_inline bool riscv_insn_is_c_jalr(u32 code) > > > > #define RV_IMM_SIGN(x) (-(((x) >> 31) & 1)) > > #define RVC_IMM_SIGN(x) (-(((x) >> 12) & 1)) > > -#define RV_X(X, s, mask) (((X) >> (s)) & (mask)) > > -#define RVC_X(X, s, mask) RV_X(X, s, mask) > > +#define RV_X(X, s, n) (((X) >> (s)) & ((1 << (n)) - 1)) > > Assuming n is arbitrary then we should be using BIT_ULL. > Eh, scratch this. We know n has to be 31 or less since these macros are for instruction encodings. Thanks, drew _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv