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Tue, 29 Apr 2025 02:06:00 -0700 (PDT) Received: from localhost ([2a02:8308:a00c:e200::f716]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3a073e5da02sm13462185f8f.93.2025.04.29.02.05.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Apr 2025 02:06:00 -0700 (PDT) Date: Tue, 29 Apr 2025 11:05:59 +0200 From: Andrew Jones To: Atish Patra Cc: Anup Patel , Atish Patra , Paolo Bonzini , Shuah Khan , Paul Walmsley , Palmer Dabbelt , Alexandre Ghiti , kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 1/3] KVM: riscv: selftests: Add stval to exception handling Message-ID: <20250429-683f10a791d9ec41b060ec4a@orel> References: <20250324-kvm_selftest_improve-v1-0-583620219d4f@rivosinc.com> <20250324-kvm_selftest_improve-v1-1-583620219d4f@rivosinc.com> <20250425-dc44cb547ab5e2f994c94e80@orel> <3b05d1a0-c873-4e61-b98c-b725d0dbb350@linux.dev> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <3b05d1a0-c873-4e61-b98c-b725d0dbb350@linux.dev> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250429_020602_695037_E0472C97 X-CRM114-Status: GOOD ( 28.85 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Mon, Apr 28, 2025 at 03:47:47PM -0700, Atish Patra wrote: > = > On 4/25/25 6:50 AM, Andrew Jones wrote: > > On Mon, Mar 24, 2025 at 05:40:29PM -0700, Atish Patra wrote: > > > Save stval during exception handling so that it can be decoded to > > > figure out the details of exception type. > > > = > > > Signed-off-by: Atish Patra > > > --- > > > tools/testing/selftests/kvm/include/riscv/processor.h | 1 + > > > tools/testing/selftests/kvm/lib/riscv/handlers.S | 2 ++ > > > 2 files changed, 3 insertions(+) > > > = > > > diff --git a/tools/testing/selftests/kvm/include/riscv/processor.h b/= tools/testing/selftests/kvm/include/riscv/processor.h > > > index 5f389166338c..f4a7d64fbe9a 100644 > > > --- a/tools/testing/selftests/kvm/include/riscv/processor.h > > > +++ b/tools/testing/selftests/kvm/include/riscv/processor.h > > > @@ -95,6 +95,7 @@ struct ex_regs { > > > unsigned long epc; > > > unsigned long status; > > > unsigned long cause; > > > + unsigned long stval; > > > }; > > > #define NR_VECTORS 2 > > > diff --git a/tools/testing/selftests/kvm/lib/riscv/handlers.S b/tools= /testing/selftests/kvm/lib/riscv/handlers.S > > > index aa0abd3f35bb..2884c1e8939b 100644 > > > --- a/tools/testing/selftests/kvm/lib/riscv/handlers.S > > > +++ b/tools/testing/selftests/kvm/lib/riscv/handlers.S > > > @@ -45,9 +45,11 @@ > > > csrr s0, CSR_SEPC > > > csrr s1, CSR_SSTATUS > > > csrr s2, CSR_SCAUSE > > > + csrr s3, CSR_STVAL > > > sd s0, 248(sp) > > > sd s1, 256(sp) > > > sd s2, 264(sp) > > > + sd s3, 272(sp) > > We can't add stval without also changing how much stack we allocate at = the > > top of this macro, but since we need to keep sp 16-byte aligned in order > > to call C code (route_exception()) we'll need to decrement -8*36, not > = > Yes. Thanks for catching that. > = > > -8*35. Or, we could just switch struct ex_regs to be the kernel's struct > > pt_regs which has 36 unsigned longs. The 'badaddr' member is for stval = and > > the additional long is orig_a0. > = > I think switching to pt_regs is better in terms of maintainability in the > future. > I will do that. > = > > > .endm > > > .macro restore_context > > I guess we should restore stval too. > = > Do we ?=A0 stval is written by hardware and doesn't contain any state of = the > interrupted program. > Once, the trap handler processes the trap using stval information, there = is > no need to restore it. True. It just felt unbalanced. Thanks, drew > = > Am I missing something ? > = > > Thanks, > > drew > > = > > > -- = > > > 2.43.0 > > > = > > > = > > > -- = > > > kvm-riscv mailing list > > > kvm-riscv@lists.infradead.org > > > http://lists.infradead.org/mailman/listinfo/kvm-riscv _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv