From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 18F61C3ABAA for ; Sat, 3 May 2025 15:19:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=NtVerwrBISk2ym7aokpoHl+FDv5qD/lktSxpRtvSsbk=; b=F2t/12s4OdKSZ3 WgR03LKbWVwBBhb0g6WnpjgiBGgrStXB90BFw0o26Sd1WBww2YiWkPo0enHtxn/w6oeUjXoqeojdH W1V3WLN+wuOtlSEaz2QzbkJ/TQGxn0QpHIPgGwbNehjURxxevV2ADgrs7hHpZrs+7dulOfmbYmKQd R0ujMB6ACJmNMcWkVPHvPk74nJpWiTiqdiCQtQWIKAIRuXKdb7vR+oPnpqGd/T47Z3p1XLW5ya631 MI5tBRmlQMzsUTrUaQxhEArJFHtrisdluD4OFTKIgM6k0CFmUom9N+GME+hmaEmgganp7AIpxEOth fiIc3Vh1fWchoqvRzIew==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1uBEeS-0000000418E-3s1H; Sat, 03 May 2025 15:19:40 +0000 Received: from 60-248-80-70.hinet-ip.hinet.net ([60.248.80.70] helo=Atcsqr.andestech.com) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1uBEeP-0000000415X-0yPO for linux-riscv@lists.infradead.org; Sat, 03 May 2025 15:19:39 +0000 Received: from mail.andestech.com (ATCPCS31.andestech.com [10.0.1.89]) by Atcsqr.andestech.com with ESMTPS id 543FIhXJ087568 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Sat, 3 May 2025 23:18:43 +0800 (+08) (envelope-from ben717@andestech.com) Received: from swlinux02.andestech.com (10.0.15.183) by ATCPCS31.andestech.com (10.0.1.89) with Microsoft SMTP Server id 14.3.498.0; Sat, 3 May 2025 23:18:43 +0800 From: Ben Zong-You Xie To: CC: , , , , , , , , , , , , , , "Ben Zong-You Xie" Subject: [PATCH v2 2/9] dt-bindings: riscv: add Andes QiLai SoC and the Voyager board bindings Date: Sat, 3 May 2025 23:18:22 +0800 Message-ID: <20250503151829.605006-3-ben717@andestech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250503151829.605006-1-ben717@andestech.com> References: <20250503151829.605006-1-ben717@andestech.com> MIME-Version: 1.0 X-Originating-IP: [10.0.15.183] X-DKIM-Results: atcpcs31.andestech.com; dkim=none; X-DNSRBL: X-MAIL: Atcsqr.andestech.com 543FIhXJ087568 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250503_081937_599271_67AABBA9 X-CRM114-Status: GOOD ( 11.44 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Add DT binding documentation for the Andes QiLai SoC and the Voyager development board. Signed-off-by: Ben Zong-You Xie Reviewed-by: Rob Herring (Arm) --- .../devicetree/bindings/riscv/andes.yaml | 25 +++++++++++++++++++ MAINTAINERS | 5 ++++ 2 files changed, 30 insertions(+) create mode 100644 Documentation/devicetree/bindings/riscv/andes.yaml diff --git a/Documentation/devicetree/bindings/riscv/andes.yaml b/Documentation/devicetree/bindings/riscv/andes.yaml new file mode 100644 index 000000000000..aa1edf1fdec7 --- /dev/null +++ b/Documentation/devicetree/bindings/riscv/andes.yaml @@ -0,0 +1,25 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/riscv/andes.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Andes SoC-based boards + +maintainers: + - Ben Zong-You Xie + +description: + Andes SoC-based boards + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - items: + - enum: + - andestech,voyager + - const: andestech,qilai + +additionalProperties: true diff --git a/MAINTAINERS b/MAINTAINERS index 3cbf9ac0d83f..8ac96b1f2e09 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -20809,6 +20809,11 @@ F: drivers/irqchip/irq-riscv-intc.c F: include/linux/irqchip/riscv-aplic.h F: include/linux/irqchip/riscv-imsic.h +RISC-V ANDES SoC Support +M: Ben Zong-You Xie +S: Maintained +F: Documentation/devicetree/bindings/riscv/andes.yaml + RISC-V ARCHITECTURE M: Paul Walmsley M: Palmer Dabbelt -- 2.34.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv