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boundary="===============7475344296125180867==" Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org --===============7475344296125180867== Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="9oQ+77yUoZqjb+2M" Content-Disposition: inline --9oQ+77yUoZqjb+2M Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Sat, May 31, 2025 at 10:49:58AM +0800, Chen Wang wrote: >=20 > On 2025/5/31 9:34, Inochi Amaoto wrote: > > On Tue, May 27, 2025 at 06:22:05PM +0800, Chen Wang wrote: > > > On 2025/5/27 17:34, Han Gao wrote: > > > > On Thu, May 15, 2025 at 9:33=E2=80=AFAM Chen Wang wrote: > > > > > On 2025/5/14 23:15, Han Gao wrote: > > > > > > sg2042 support Zfh ISA extension [1]. > > > > > >=20 > > > > > > Link: https://occ-oss-prod.oss-cn-hangzhou.aliyuncs.com/resourc= e//1737721869472/%E7%8E%84%E9%93%81C910%E4%B8%8EC920R1S6%E7%94%A8%E6%88%B7%= E6%89%8B%E5%86%8C%28xrvm%29_20250124.pdf [1] > > > > > >=20 > > > > > > Signed-off-by: Han Gao > > > > > > --- > > > > > > arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi | 256 +++++++++= +---------- > > > > > > 1 file changed, 128 insertions(+), 128 deletions(-) > > > > > >=20 > > > > > > diff --git a/arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi b/arch= /riscv/boot/dts/sophgo/sg2042-cpus.dtsi > > > > > > index f483f62ab0c4..8dd1a3c60bc4 100644 > > > > > > --- a/arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi > > > > > > +++ b/arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi > > > > > > @@ -256,11 +256,11 @@ core3 { > > > > > > cpu0: cpu@0 { > > > > > > compatible =3D "thead,c920", "riscv"; > > > > > > device_type =3D "cpu"; > > > > > > - riscv,isa =3D "rv64imafdc"; > > > > > > + riscv,isa =3D "rv64imafdc_zfh"; > > > > > Need not touch this. "riscv,isa" is deprecated and replaced by > > > > > "riscv,isa-base" & "riscv,isa-extensions". > > > > >=20 > > > > > And only adding zfh for this looks a bit werid. > > > > >=20 > > > > > Actually, I plan to remove "riscv,isa" later, so please don't tou= ch this > > > > > from now on. > > > > I think that since the linux kernel is the upstream for devicetree,= it > > > > cannot yet remove riscv, isa needs to maintain compatibility. > > > OK, maybe it's not good to remove "riscv,isa". > > >=20 > > > Can this patch not modify "riscv,isa", but only add something for > > > "riscv,isa-extensions"? > > >=20 > > I can remove this while merging the patch, is it OK for you? > Han does not want to remove this "riscv,isa"=EF=BC=8Che said some other c= omponents, > such as u-boot may have dependency on this. U-Boot shouldn't, what actually needs it, opensbi? --9oQ+77yUoZqjb+2M Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCaEMQ5gAKCRB4tDGHoIJi 0svJAP9Sj+tPyw/qgj7Nuqwdlm3h9SJL2W8YJeG/9/7t7SMLmAD/QshrFinvdV9O 0fyCldiYSrBiW7dQFbTy4jBpo492ag4= =3AHM -----END PGP SIGNATURE----- --9oQ+77yUoZqjb+2M-- --===============7475344296125180867== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv --===============7475344296125180867==--