From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7FC4CC77B7C for ; Mon, 23 Jun 2025 16:30:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=xJmE8hehacIkgc5sLURDByYlN8nAIHNo1BG0Kh0NbRI=; b=Leo5MTIZ9+sqSY AXraWLpJOh217indvwnQaA8LzBw3GKn1i/q6lWIj5IO/NbVWDU8M3xVBK4zTRZvQB5YwDhUz/FIy+ L3A/Vm0GROsXC/IS3W4IS/4qXsm82CYKw/5njtKnkNNugDYmZ4UXwr7vgkMek8pbvqmA/YSj34Hk3 buYAmStRx5BBQB5drZUsRWy4QG/YVRNmsBuOrFiPD9lS2oYLEc4fPtVx01bf4sX5ZOahdxfgJijnT MWH8NNXoMEI7105Sn3wzi4PJfaQc8Q+GS9R/2nj50+lU+AaQyXGiNCcK1l+kDhcGOh+SOd3YYn+c1 z471xL06k5imTStXdvxg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1uTk3y-00000003QZ9-1Vtj; Mon, 23 Jun 2025 16:30:30 +0000 Received: from nyc.source.kernel.org ([2604:1380:45d1:ec00::3]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1uTgjc-00000002nD7-2wPX for linux-riscv@lists.infradead.org; Mon, 23 Jun 2025 12:57:17 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by nyc.source.kernel.org (Postfix) with ESMTP id 09E68A51B00; Mon, 23 Jun 2025 12:57:16 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 66D50C4CEF1; Mon, 23 Jun 2025 12:57:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1750683435; bh=DJSrVH7GlOfN6cb35orDOkMbtdc3M+/Haiv087kcVL8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nwk0lrZoQ8QRJxM8yO+5HvwUYw5maLMsKdJH7qfImv4ivCVFRbevnbIGIjyAeQWbI txTlVb6SH/C97X4uHb7kWgjgCejXe+58nfgkHfi3Hc+KnqfSX+M+kYcqrkYIUxwoms 1zj+Aeg9LVPNZEwfvWK31I/t2WZ7zGCzoeKVGS6BmS6pne6FwPmMvcP4lIEsNxZFWK 0NjXeQTt69EaSiPuxE1hS/c0bfg6CRcAs+PxecqSNGmVZm8USpn8i4KMtS5Wi0NTTW yIZEtN5HJ5SuLMsxoN1w658SLRPRKuwtwjp9zu/fe/i8057A46RC3+OPG4/7fLmOpJ 1RUNEPYYhpdcA== From: Conor Dooley To: sboyd@kernel.org Cc: conor@kernel.org, Conor Dooley , Daire McNamara , pierre-henry.moussay@microchip.com, valentina.fernandezalanis@microchip.com, Michael Turquette , Rob Herring , Krzysztof Kozlowski , Jassi Brar , Lee Jones , Paul Walmsley , Palmer Dabbelt , Philipp Zabel , linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 7/9] riscv: dts: microchip: convert clock and reset to use syscon Date: Mon, 23 Jun 2025 13:56:21 +0100 Message-ID: <20250623-bobble-corncob-6c4e70431679@spud> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250623-levitate-nugget-08c9a01f401d@spud> References: <20250623-levitate-nugget-08c9a01f401d@spud> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2218; i=conor.dooley@microchip.com; h=from:subject:message-id; bh=UH99rELY30Gno51gklgXi1R8GCrl6eHh831fS+cCFNY=; b=owGbwMvMwCFWscWwfUFT0iXG02pJDBmRfh+Kdp1KKuifLc+kYCjJxlj+7rzhSoHGqVsiDI4u9 9uwcuG8jlIWBjEOBlkxRZbE230tUuv/uOxw7nkLM4eVCWQIAxenAExk+mWG/04HQjw65q2WbJJk OlKyU2dV47GUujNGmZ//nVJbFVgwdxIjw/lg59rzC2StGNjzp0hfmH3+F9cBFbHi6KWF5m8v+9d v4gIA X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250623_055716_864625_270536BC X-CRM114-Status: GOOD ( 10.77 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Conor Dooley The "subblock" clocks and reset registers on PolarFire SoC are located in the mss-top-sysreg region, alongside pinctrl and interrupt control functionality. Re-write the devicetree to describe the sys explicitly, as its own node, rather than as a region of the clock node. Correspondingly, the phandles to the reset controller must be updated to the new provider. The drivers will continue to support the old way of doing things. Signed-off-by: Conor Dooley --- arch/riscv/boot/dts/microchip/mpfs.dtsi | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/arch/riscv/boot/dts/microchip/mpfs.dtsi b/arch/riscv/boot/dts/microchip/mpfs.dtsi index f9d6bf08e7170..5c2963e269b83 100644 --- a/arch/riscv/boot/dts/microchip/mpfs.dtsi +++ b/arch/riscv/boot/dts/microchip/mpfs.dtsi @@ -251,11 +251,9 @@ pdma: dma-controller@3000000 { #dma-cells = <1>; }; - clkcfg: clkcfg@20002000 { - compatible = "microchip,mpfs-clkcfg"; - reg = <0x0 0x20002000 0x0 0x1000>, <0x0 0x3E001000 0x0 0x1000>; - clocks = <&refclk>; - #clock-cells = <1>; + mss_top_sysreg: syscon@20002000 { + compatible = "microchip,mpfs-mss-top-sysreg", "syscon", "simple-mfd"; + reg = <0x0 0x20002000 0x0 0x1000>; #reset-cells = <1>; }; @@ -452,7 +450,7 @@ mac0: ethernet@20110000 { local-mac-address = [00 00 00 00 00 00]; clocks = <&clkcfg CLK_MAC0>, <&clkcfg CLK_AHB>; clock-names = "pclk", "hclk"; - resets = <&clkcfg CLK_MAC0>; + resets = <&mss_top_sysreg CLK_MAC0>; status = "disabled"; }; @@ -466,7 +464,7 @@ mac1: ethernet@20112000 { local-mac-address = [00 00 00 00 00 00]; clocks = <&clkcfg CLK_MAC1>, <&clkcfg CLK_AHB>; clock-names = "pclk", "hclk"; - resets = <&clkcfg CLK_MAC1>; + resets = <&mss_top_sysreg CLK_MAC1>; status = "disabled"; }; @@ -550,5 +548,12 @@ syscontroller_qspi: spi@37020100 { clocks = <&scbclk>; status = "disabled"; }; + + clkcfg: clkcfg@3e001000 { + compatible = "microchip,mpfs-clkcfg"; + reg = <0x0 0x3e001000 0x0 0x1000>; + clocks = <&refclk>; + #clock-cells = <1>; + }; }; }; -- 2.45.2 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv