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Tue, 24 Jun 2025 06:47:07 -0700 (PDT) Received: from localhost ([2a02:8308:a00c:e200::5485]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-45361461375sm160230815e9.14.2025.06.24.06.47.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 24 Jun 2025 06:47:07 -0700 (PDT) Date: Tue, 24 Jun 2025 15:47:06 +0200 From: Andrew Jones To: zhouquan@iscas.ac.cn Cc: anup@brainfault.org, atishp@atishpatra.org, paul.walmsley@sifive.com, palmer@dabbelt.com, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org Subject: Re: [PATCH 4/5] KVM: riscv: selftests: Add Zicbop extension to get-reg-list test Message-ID: <20250624-1960ad3d8a1108b04ea85d9d@orel> References: <3591f5aed544f9026d8375651936e006b57defdb.1750164414.git.zhouquan@iscas.ac.cn> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <3591f5aed544f9026d8375651936e006b57defdb.1750164414.git.zhouquan@iscas.ac.cn> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250624_064709_352675_382C1EFF X-CRM114-Status: GOOD ( 16.20 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Tue, Jun 17, 2025 at 09:10:42PM +0800, zhouquan@iscas.ac.cn wrote: > From: Quan Zhou > > The KVM RISC-V allows Zicbop extension for Guest/VM > so add them to get-reg-list test. > > Signed-off-by: Quan Zhou > --- > tools/testing/selftests/kvm/riscv/get-reg-list.c | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c b/tools/testing/selftests/kvm/riscv/get-reg-list.c > index a0b7dabb5040..ebdc34b58bad 100644 > --- a/tools/testing/selftests/kvm/riscv/get-reg-list.c > +++ b/tools/testing/selftests/kvm/riscv/get-reg-list.c > @@ -83,6 +83,7 @@ bool filter_reg(__u64 reg) > case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZFH: > case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZFHMIN: > case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZICBOM: > + case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZICBOP: > case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZICBOZ: > case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZICCRSE: > case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZICNTR: > @@ -253,6 +254,8 @@ static const char *config_id_to_str(const char *prefix, __u64 id) > return "KVM_REG_RISCV_CONFIG_REG(isa)"; > case KVM_REG_RISCV_CONFIG_REG(zicbom_block_size): > return "KVM_REG_RISCV_CONFIG_REG(zicbom_block_size)"; > + case KVM_REG_RISCV_CONFIG_REG(zicbop_block_size): > + return "KVM_REG_RISCV_CONFIG_REG(zicbop_block_size)"; > case KVM_REG_RISCV_CONFIG_REG(zicboz_block_size): > return "KVM_REG_RISCV_CONFIG_REG(zicboz_block_size)"; > case KVM_REG_RISCV_CONFIG_REG(mvendorid): > @@ -535,6 +538,7 @@ static const char *isa_ext_single_id_to_str(__u64 reg_off) > KVM_ISA_EXT_ARR(ZFH), > KVM_ISA_EXT_ARR(ZFHMIN), > KVM_ISA_EXT_ARR(ZICBOM), > + KVM_ISA_EXT_ARR(ZICBOP), > KVM_ISA_EXT_ARR(ZICBOZ), > KVM_ISA_EXT_ARR(ZICCRSE), > KVM_ISA_EXT_ARR(ZICNTR), > @@ -864,6 +868,11 @@ static __u64 zicbom_regs[] = { > KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZICBOM, > }; > > +static __u64 zicbop_regs[] = { > + KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_CONFIG | KVM_REG_RISCV_CONFIG_REG(zicbop_block_size), > + KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZICBOP, > +}; > + > static __u64 zicboz_regs[] = { > KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_CONFIG | KVM_REG_RISCV_CONFIG_REG(zicboz_block_size), > KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZICBOZ, > @@ -1012,6 +1021,8 @@ static __u64 vector_regs[] = { > .regs = sbi_sta_regs, .regs_n = ARRAY_SIZE(sbi_sta_regs),} > #define SUBLIST_ZICBOM \ > {"zicbom", .feature = KVM_RISCV_ISA_EXT_ZICBOM, .regs = zicbom_regs, .regs_n = ARRAY_SIZE(zicbom_regs),} > +#define SUBLIST_ZICBOP \ > + {"zicbop", .feature = KVM_RISCV_ISA_EXT_ZICBOP, .regs = zicbop_regs, .regs_n = ARRAY_SIZE(zicbop_regs),} > #define SUBLIST_ZICBOZ \ > {"zicboz", .feature = KVM_RISCV_ISA_EXT_ZICBOZ, .regs = zicboz_regs, .regs_n = ARRAY_SIZE(zicboz_regs),} > #define SUBLIST_AIA \ > @@ -1130,6 +1141,7 @@ KVM_ISA_EXT_SIMPLE_CONFIG(zfa, ZFA); > KVM_ISA_EXT_SIMPLE_CONFIG(zfh, ZFH); > KVM_ISA_EXT_SIMPLE_CONFIG(zfhmin, ZFHMIN); > KVM_ISA_EXT_SUBLIST_CONFIG(zicbom, ZICBOM); > +KVM_ISA_EXT_SUBLIST_CONFIG(zicbop, ZICBOP); > KVM_ISA_EXT_SUBLIST_CONFIG(zicboz, ZICBOZ); > KVM_ISA_EXT_SIMPLE_CONFIG(ziccrse, ZICCRSE); > KVM_ISA_EXT_SIMPLE_CONFIG(zicntr, ZICNTR); > @@ -1204,6 +1216,7 @@ struct vcpu_reg_list *vcpu_configs[] = { > &config_zfh, > &config_zfhmin, > &config_zicbom, > + &config_zicbop, > &config_zicboz, > &config_ziccrse, > &config_zicntr, > -- > 2.34.1 > Reviewed-by: Andrew Jones _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv