From: Andrew Jones <ajones@ventanamicro.com>
To: zhouquan@iscas.ac.cn
Cc: anup@brainfault.org, atishp@atishpatra.org,
paul.walmsley@sifive.com, palmer@dabbelt.com,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
kvm@vger.kernel.org, kvm-riscv@lists.infradead.org
Subject: Re: [PATCH 2/5] RISC-V: KVM: Allow Zicbop extension for Guest/VM
Date: Tue, 24 Jun 2025 15:46:08 +0200 [thread overview]
Message-ID: <20250624-fd191a60c31c732c0d401f46@orel> (raw)
In-Reply-To: <e2a040c161f17c1717b64750e774474d8ee8f0d6.1750164414.git.zhouquan@iscas.ac.cn>
On Tue, Jun 17, 2025 at 09:10:30PM +0800, zhouquan@iscas.ac.cn wrote:
> From: Quan Zhou <zhouquan@iscas.ac.cn>
>
> Extend the KVM ISA extension ONE_REG interface to allow KVM user space
> to detect and enable Zicbop extension for Guest/VM.
>
> Signed-off-by: Quan Zhou <zhouquan@iscas.ac.cn>
> ---
> arch/riscv/include/uapi/asm/kvm.h | 1 +
> arch/riscv/kvm/vcpu_onereg.c | 2 ++
> 2 files changed, 3 insertions(+)
>
> diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h
> index 0863ca178066..56959d277e86 100644
> --- a/arch/riscv/include/uapi/asm/kvm.h
> +++ b/arch/riscv/include/uapi/asm/kvm.h
> @@ -185,6 +185,7 @@ enum KVM_RISCV_ISA_EXT_ID {
> KVM_RISCV_ISA_EXT_ZICCRSE,
> KVM_RISCV_ISA_EXT_ZAAMO,
> KVM_RISCV_ISA_EXT_ZALRSC,
> + KVM_RISCV_ISA_EXT_ZICBOP,
> KVM_RISCV_ISA_EXT_MAX,
> };
>
> diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c
> index b08a22eaa7a7..d444ec9e9e8e 100644
> --- a/arch/riscv/kvm/vcpu_onereg.c
> +++ b/arch/riscv/kvm/vcpu_onereg.c
> @@ -68,6 +68,7 @@ static const unsigned long kvm_isa_ext_arr[] = {
> KVM_ISA_EXT_ARR(ZFH),
> KVM_ISA_EXT_ARR(ZFHMIN),
> KVM_ISA_EXT_ARR(ZICBOM),
> + KVM_ISA_EXT_ARR(ZICBOP),
> KVM_ISA_EXT_ARR(ZICBOZ),
> KVM_ISA_EXT_ARR(ZICCRSE),
> KVM_ISA_EXT_ARR(ZICNTR),
> @@ -171,6 +172,7 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext)
> case KVM_RISCV_ISA_EXT_ZFA:
> case KVM_RISCV_ISA_EXT_ZFH:
> case KVM_RISCV_ISA_EXT_ZFHMIN:
> + case KVM_RISCV_ISA_EXT_ZICBOP:
> case KVM_RISCV_ISA_EXT_ZICCRSE:
> case KVM_RISCV_ISA_EXT_ZICNTR:
> case KVM_RISCV_ISA_EXT_ZICOND:
> --
> 2.34.1
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
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next prev parent reply other threads:[~2025-06-24 14:14 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-17 13:10 [PATCH 0/5] RISC-V: KVM: Allow zicop/bfloat16 exts for guest zhouquan
2025-06-17 13:10 ` [PATCH 1/5] RISC-V: KVM: Provide UAPI for Zicbop block size zhouquan
2025-06-20 9:36 ` Nutty Liu
2025-06-24 13:45 ` Andrew Jones
2025-06-17 13:10 ` [PATCH 2/5] RISC-V: KVM: Allow Zicbop extension for Guest/VM zhouquan
2025-06-20 9:40 ` Nutty Liu
2025-06-24 13:46 ` Andrew Jones [this message]
2025-06-17 13:10 ` [PATCH 3/5] RISC-V: KVM: Allow bfloat16 " zhouquan
2025-06-20 9:49 ` Nutty Liu
2025-06-24 13:46 ` Andrew Jones
2025-06-17 13:10 ` [PATCH 4/5] KVM: riscv: selftests: Add Zicbop extension to get-reg-list test zhouquan
2025-06-20 9:58 ` Nutty Liu
2025-06-24 13:47 ` Andrew Jones
2025-06-17 13:10 ` [PATCH 5/5] KVM: riscv: selftests: Add bfloat16 " zhouquan
2025-06-20 9:58 ` Nutty Liu
2025-06-24 13:47 ` Andrew Jones
2025-07-17 12:04 ` [PATCH 0/5] RISC-V: KVM: Allow zicop/bfloat16 exts for guest Anup Patel
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