From: Nick Hu <nick.hu@sifive.com>
To: Alexandre Ghiti <alex@ghiti.fr>, linux-riscv@lists.infradead.org
Cc: Nick Hu <nick.hu@sifive.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>
Subject: [PATCH 0/2] riscv-imsic/aplic: Save and restore the registers
Date: Wed, 9 Jul 2025 10:55:14 +0800 [thread overview]
Message-ID: <20250709025516.28051-1-nick.hu@sifive.com> (raw)
Since the APLIC and IMSIC may be powered down when the CPUs enter a deep
sleep state, it is necessary to implement save and restore functions to
ensure their states are correctly preserved and restored.
Nick Hu (2):
irqchip/riscv-imsic: Restore the IMSIC register
irqchip/riscv-aplic: Add save and restore functions
drivers/irqchip/irq-riscv-aplic-direct.c | 14 ++-
drivers/irqchip/irq-riscv-aplic-main.c | 143 +++++++++++++++++++++++
drivers/irqchip/irq-riscv-aplic-main.h | 12 ++
drivers/irqchip/irq-riscv-aplic-msi.c | 3 +-
drivers/irqchip/irq-riscv-imsic-early.c | 40 +++++--
5 files changed, 203 insertions(+), 9 deletions(-)
--
2.17.1
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next reply other threads:[~2025-07-09 2:56 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-09 2:55 Nick Hu [this message]
2025-07-09 2:55 ` [PATCH 1/2] irqchip/riscv-imsic: Restore the IMSIC registers Nick Hu
2025-07-17 5:15 ` Anup Patel
2025-07-17 7:24 ` Nick Hu
2025-07-09 2:55 ` [PATCH 2/2] irqchip/riscv-aplic: Save and restore APLIC registers Nick Hu
2025-07-10 17:47 ` kernel test robot
2025-07-17 5:15 ` Anup Patel
2025-07-17 7:26 ` Nick Hu
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