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[34.125.81.106]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-23fbe4fd692sm86545ad.91.2025.07.25.08.33.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Jul 2025 08:33:56 -0700 (PDT) Date: Fri, 25 Jul 2025 15:33:51 +0000 From: Sami Tolvanen To: Deepak Gupta Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Masahiro Yamada , Nathan Chancellor , Nicolas Schier , Andrew Morton , David Hildenbrand , Lorenzo Stoakes , "Liam R. Howlett" , Vlastimil Babka , Mike Rapoport , Suren Baghdasaryan , Michal Hocko , Nick Desaulniers , Bill Wendling , Monk Chiang , Kito Cheng , Justin Stitt , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kbuild@vger.kernel.org, linux-mm@kvack.org, llvm@lists.linux.dev, rick.p.edgecombe@intel.com, broonie@kernel.org, cleger@rivosinc.com, apatel@ventanamicro.com, ajones@ventanamicro.com, conor.dooley@microchip.com, charlie@rivosinc.com, samuel.holland@sifive.com, bjorn@rivosinc.com, fweimer@redhat.com, jeffreyalaw@gmail.com, heinrich.schuchardt@canonical.com, andrew@sifive.com, ved@rivosinc.com Subject: Re: [PATCH 02/11] riscv: update asm call site in `call_on_irq_stack` to setup correct label Message-ID: <20250725153351.GB1724026@google.com> References: <20250724-riscv_kcfi-v1-0-04b8fa44c98c@rivosinc.com> <20250724-riscv_kcfi-v1-2-04b8fa44c98c@rivosinc.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20250724-riscv_kcfi-v1-2-04b8fa44c98c@rivosinc.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250725_083358_141386_78E8C1D2 X-CRM114-Status: GOOD ( 16.58 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Thu, Jul 24, 2025 at 04:36:55PM -0700, Deepak Gupta wrote: > Call sites written in asm performing indirect call, they need to setup > label register (t2/x7) with correct label. > > Currently first kernel was compiled with `-save-temps` option and > normalized function signature string is captured and then placed at the > asm callsite. > > TODO: to write a macro wrapper with toolchain support. > > Signed-off-by: Deepak Gupta > --- > arch/riscv/kernel/entry.S | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S > index 2660faf52232..598e17e800ae 100644 > --- a/arch/riscv/kernel/entry.S > +++ b/arch/riscv/kernel/entry.S > @@ -389,6 +389,7 @@ SYM_FUNC_START(call_on_irq_stack) > load_per_cpu t0, irq_stack_ptr, t1 > li t1, IRQ_STACK_SIZE > add sp, t0, t1 > + lui t2, %lpad_hash("FvP7pt_regsE") Ah, I see. The plan is to hardcode the signatures in assembly code and keep them manually in sync with C code. When we implemented KCFI, we thought this would become extremely tedious to maintain after a while. Do you have any plans to add KCFI-style __kcfi_typeid_ symbols that would allow labels to be determined from C type signatures instead? Sami _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv