From: Andrew Jones <ajones@ventanamicro.com>
To: dayss1224@gmail.com
Cc: kvm@vger.kernel.org, linux-kselftest@vger.kernel.org,
linux-kernel@vger.kernel.org, kvm-riscv@lists.infradead.org,
linux-riscv@lists.infradead.org,
Paolo Bonzini <pbonzini@redhat.com>,
Shuah Khan <shuah@kernel.org>, Anup Patel <anup@brainfault.org>,
Atish Patra <atish.patra@linux.dev>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Mathieu Desnoyers <mathieu.desnoyers@efficios.com>,
Peter Zijlstra <peterz@infradead.org>,
"Paul E. McKenney" <paulmck@kernel.org>,
Boqun Feng <boqun.feng@gmail.com>,
Quan Zhou <zhouquan@iscas.ac.cn>
Subject: Re: [PATCH v2 2/3] KVM: riscv: selftests: Use the existing RISCV_FENCE macro in `rseq-riscv.h`
Date: Mon, 18 Aug 2025 15:49:18 -0500 [thread overview]
Message-ID: <20250818-617bdc4613bfa02c291a6b47@orel> (raw)
In-Reply-To: <7de4aedb44be3166a6568c28da70c0d2d4850571.1754308799.git.dayss1224@gmail.com>
On Thu, Aug 07, 2025 at 10:59:29PM +0800, dayss1224@gmail.com wrote:
> From: Quan Zhou <zhouquan@iscas.ac.cn>
>
> To avoid redefinition issues with RISCV_FENCE,
> directly reference the existing macro in `rseq-riscv.h`.
>
> Signed-off-by: Quan Zhou <zhouquan@iscas.ac.cn>
> Signed-off-by: Dong Yang <dayss1224@gmail.com>
> ---
> tools/testing/selftests/rseq/rseq-riscv.h | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/tools/testing/selftests/rseq/rseq-riscv.h b/tools/testing/selftests/rseq/rseq-riscv.h
> index 67d544aaa..06c840e81 100644
> --- a/tools/testing/selftests/rseq/rseq-riscv.h
> +++ b/tools/testing/selftests/rseq/rseq-riscv.h
> @@ -8,6 +8,7 @@
> * exception when executed in all modes.
> */
> #include <endian.h>
> +#include <asm/fence.h>
>
> #if defined(__BYTE_ORDER) ? (__BYTE_ORDER == __LITTLE_ENDIAN) : defined(__LITTLE_ENDIAN)
> #define RSEQ_SIG 0xf1401073 /* csrr mhartid, x0 */
> @@ -24,8 +25,6 @@
> #define REG_L __REG_SEL("ld ", "lw ")
> #define REG_S __REG_SEL("sd ", "sw ")
>
> -#define RISCV_FENCE(p, s) \
> - __asm__ __volatile__ ("fence " #p "," #s : : : "memory")
> #define rseq_smp_mb() RISCV_FENCE(rw, rw)
> #define rseq_smp_rmb() RISCV_FENCE(r, r)
> #define rseq_smp_wmb() RISCV_FENCE(w, w)
> --
> 2.34.1
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
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next prev parent reply other threads:[~2025-08-18 21:30 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-07 14:59 [PATCH v2 0/3] KVM: riscv: selftests: Enable supported test cases dayss1224
2025-08-07 14:59 ` [PATCH v2 1/3] KVM: riscv: selftests: Add common " dayss1224
2025-08-19 0:20 ` Andrew Jones
2025-08-07 14:59 ` [PATCH v2 2/3] KVM: riscv: selftests: Use the existing RISCV_FENCE macro in `rseq-riscv.h` dayss1224
2025-08-18 20:49 ` Andrew Jones [this message]
2025-08-07 14:59 ` [PATCH v2 3/3] KVM: riscv: selftests: Add missing headers for new testcases dayss1224
2025-08-18 21:01 ` Andrew Jones
2025-08-19 0:20 ` [PATCH v2 0/3] KVM: riscv: selftests: Enable supported test cases Andrew Jones
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