From: Ben Dooks <ben.dooks@codethink.co.uk>
To: linux-riscv@lists.infradead.org,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>
Cc: -linux-kernel@vger.kernel.org, Alexandre Ghiti <alex@ghiti.fr>,
Javier Jardon <javier.jardon@codethink.co.uk>,
Ben Dooks <bjdooks@gmail.com>,
Lawrence Hunter <lawrence.hunter@codethink.co.uk>,
Roan Richmod <roan.richmond@codethink.co.uk>,
Sam Grove <sgrove@mips.com>, Chao-ying Fu <cfu@mips.com>,
Mukunda Aprameya <maprameya@mips.com>,
Umesh Kalappa <ukalappa@mips.com>,
Djordje Todorovic <djordje.todorovic@htecgroup.com>,
Kurt Martin <kmartin@mips.com>,
allikarjuna Gouda <mgouda@mips.com>,
Vaibhav Chauthmal <vchauthmal@mips.com>,
wapnil Agrawal <sagrawal@mips.com>,
Ben Dooks <ben.dooks@codethink.co.uk>
Subject: [PATCH 03/18] riscv: disable vector if big-endian, gcc unsupported option
Date: Fri, 22 Aug 2025 17:52:33 +0100 [thread overview]
Message-ID: <20250822165248.289802-4-ben.dooks@codethink.co.uk> (raw)
In-Reply-To: <20250822165248.289802-1-ben.dooks@codethink.co.uk>
You can't build with vector enabled at the moment so remove
this until gcc is changed.
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
---
arch/riscv/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index f1c0a655cd47..ca5cd4cf6e15 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -656,6 +656,7 @@ config RISCV_ISA_V
bool "Vector extension support"
depends on TOOLCHAIN_HAS_V
depends on FPU
+ depends on CPU_LITTLE_ENDIAN
select DYNAMIC_SIGFRAME
default y
help
--
2.37.2.352.g3c44437643
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next prev parent reply other threads:[~2025-08-23 6:40 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-22 16:52 RISC-V big-endian support Ben Dooks
2025-08-22 16:52 ` [PATCH 01/18] riscv: add initial kconfig and build flags for big-endian Ben Dooks
2025-08-22 16:52 ` [PATCH 02/18] riscv: update byteorder.h " Ben Dooks
2025-08-22 16:52 ` Ben Dooks [this message]
2025-08-22 16:52 ` [PATCH 04/18] riscv: word-at-atime: move to generic if we're big endian Ben Dooks
2025-08-22 16:52 ` [PATCH 05/18] riscv: asm: use .insn for making custom instructioons Ben Dooks
2025-08-22 16:52 ` [PATCH 06/18] kconfig: remove CONFIG_COMAPT for big-endian Ben Dooks
2025-08-22 16:52 ` [PATCH 07/18] riscv: fixup use of natural endian on instructions Ben Dooks
2025-08-22 16:52 ` [PATCH 08/18] riscv: bpf: big endian fixes, updated BPF_ALU ops Ben Dooks
2025-08-22 16:52 ` [PATCH 09/18] riscv: probes: sort out endian-ness Ben Dooks
2025-08-22 16:52 ` [PATCH 10/18] riscv: ftrace big endian updates Ben Dooks
2025-08-22 16:52 ` [PATCH 11/18] riscv: traps: make insn fetch common in unknown instruction Ben Dooks
2025-08-22 16:52 ` [PATCH 12/18] riscv: threads need UBE flag setting if big-endian Ben Dooks
2025-08-22 16:52 ` [PATCH 13/18] riscv: fixes for big-endian library routines Ben Dooks
2025-08-22 16:52 ` [PATCH 14/18] riscv: update to add ASM_INSN for .2byte instructions Ben Dooks
2025-08-22 16:52 ` [PATCH 15/18] KVM: riscv: set HSTATUS big endian same as build Ben Dooks
2025-08-22 16:52 ` [PATCH 16/18] KVM: riscv: add hstatus to allow endian control Ben Dooks
2025-08-22 16:52 ` [PATCH 17/18] KVM: riscv: instructions are little endian Ben Dooks
2025-08-22 16:52 ` [PATCH 18/18] KVM: riscv: add warning if undecoded instruction Ben Dooks
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