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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org This code does not currently build with big-endian so disable it for now. Signed-off-by: Ben Dooks --- arch/riscv/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index ca5cd4cf6e15..74e01d4de86b 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -1119,7 +1119,7 @@ config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION config COMPAT bool "Kernel support for 32-bit U-mode" default 64BIT - depends on 64BIT && MMU + depends on 64BIT && MMU && !CPU_BIG_ENDIAN help This option enables support for a 32-bit U-mode running under a 64-bit kernel at S-mode. riscv32-specific components such as system calls, -- 2.37.2.352.g3c44437643 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv