From: Bjorn Helgaas <helgaas@kernel.org>
To: Randolph Lin <randolph@andestech.com>
Cc: linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
jingoohan1@gmail.com, mani@kernel.org, lpieralisi@kernel.org,
kwilczynski@kernel.org, robh@kernel.org, bhelgaas@google.com,
krzk+dt@kernel.org, conor+dt@kernel.org, alex@ghiti.fr,
aou@eecs.berkeley.edu, palmer@dabbelt.com,
paul.walmsley@sifive.com, ben717@andestech.com,
inochiama@gmail.com, thippeswamy.havalige@amd.com,
namcao@linutronix.de, shradha.t@samsung.com,
randolph.sklin@gmail.com, tim609@andestech.com
Subject: Re: [PATCH v3 1/5] PCI: dwc: Skip failed outbound iATU and continue
Date: Tue, 23 Sep 2025 09:42:23 -0500 [thread overview]
Message-ID: <20250923144223.GA2032427@bhelgaas> (raw)
In-Reply-To: <20250923113647.895686-2-randolph@andestech.com>
On Tue, Sep 23, 2025 at 07:36:43PM +0800, Randolph Lin wrote:
> Previously, outbound iATU programming included range checks based
> on hardware limitations. If a configuration did not meet these
> constraints, the loop would stop immediately.
>
> This patch updates the behavior to enhance flexibility. Instead of
> stopping at the first issue, it now logs a warning with details of
> the affected window and proceeds to program the remaining iATU
> entries.
>
> This enables partial configuration to complete in cases where some
> iATU windows may not meet requirements, improving overall
> compatibility.
It's not really clear why this is needed. I assume it's related to
dropping qilai_pcie_outbound_atu_addr_valid().
I guess dw_pcie_prog_outbound_atu() must return an error for one of
the QiLai ranges? Which one, and what exactly is the problem? I
still suspect something wrong in the devicetree description.
> Signed-off-by: Randolph Lin <randolph@andestech.com>
> ---
> drivers/pci/controller/dwc/pcie-designware-host.c | 9 +++++----
> 1 file changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> index 952f8594b501..91ee6b903934 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> @@ -756,7 +756,7 @@ static int dw_pcie_iatu_setup(struct dw_pcie_rp *pp)
> if (resource_type(entry->res) != IORESOURCE_MEM)
> continue;
>
> - if (pci->num_ob_windows <= ++i)
> + if (pci->num_ob_windows <= i)
> break;
>
> atu.index = i;
> @@ -773,9 +773,10 @@ static int dw_pcie_iatu_setup(struct dw_pcie_rp *pp)
>
> ret = dw_pcie_prog_outbound_atu(pci, &atu);
> if (ret) {
> - dev_err(pci->dev, "Failed to set MEM range %pr\n",
> - entry->res);
> - return ret;
> + dev_warn(pci->dev, "Failed to set MEM range %pr\n",
> + entry->res);
> + } else {
> + i++;
> }
> }
>
> --
> 2.34.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
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next prev parent reply other threads:[~2025-09-23 14:42 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-23 11:36 [PATCH v3 0/5] Add support for Andes Qilai SoC PCIe controller Randolph Lin
2025-09-23 11:36 ` [PATCH v3 1/5] PCI: dwc: Skip failed outbound iATU and continue Randolph Lin
2025-09-23 14:42 ` Bjorn Helgaas [this message]
2025-09-24 12:58 ` Randolph Lin
2025-09-26 21:10 ` Bjorn Helgaas
2025-09-29 14:03 ` Rob Herring
2025-09-30 12:05 ` Randolph Lin
2025-09-29 14:25 ` Manivannan Sadhasivam
2025-09-23 11:36 ` [PATCH v3 2/5] dt-bindings: PCI: Add Andes QiLai PCIe support Randolph Lin
2025-09-23 11:36 ` [PATCH v3 3/5] riscv: dts: andes: Add PCIe node into the QiLai SoC Randolph Lin
2025-09-23 11:36 ` [PATCH v3 4/5] PCI: andes: Add Andes QiLai SoC PCIe host driver support Randolph Lin
2025-09-23 15:54 ` Bjorn Helgaas
2025-09-23 11:36 ` [PATCH v3 5/5] MAINTAINERS: Add maintainers for Andes QiLai PCIe driver Randolph Lin
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