From: Randolph Lin <randolph@andestech.com>
To: <linux-kernel@vger.kernel.org>
Cc: <linux-pci@vger.kernel.org>, <linux-riscv@lists.infradead.org>,
<devicetree@vger.kernel.org>, <jingoohan1@gmail.com>,
<mani@kernel.org>, <lpieralisi@kernel.org>,
<kwilczynski@kernel.org>, <robh@kernel.org>,
<bhelgaas@google.com>, <krzk+dt@kernel.org>,
<conor+dt@kernel.org>, <alex@ghiti.fr>, <aou@eecs.berkeley.edu>,
<palmer@dabbelt.com>, <paul.walmsley@sifive.com>,
<ben717@andestech.com>, <inochiama@gmail.com>,
<thippeswamy.havalige@amd.com>, <namcao@linutronix.de>,
<shradha.t@samsung.com>, <pjw@kernel.org>,
<randolph.sklin@gmail.com>, <tim609@andestech.com>,
Randolph Lin <randolph@andestech.com>
Subject: [PATCH v6 1/5] PCI: dwc: Allow adjusting the number of ob/ib windows in glue driver
Date: Fri, 3 Oct 2025 10:35:23 +0800 [thread overview]
Message-ID: <20251003023527.3284787-2-randolph@andestech.com> (raw)
In-Reply-To: <20251003023527.3284787-1-randolph@andestech.com>
The number of ob/ib windows is determined through write-read loops
on registers in the core driver. Some glue drivers need to adjust
the number of ob/ib windows to meet specific requirements,such as
hardware limitations. This change allows the glue driver to adjust
the number of ob/ib windows to satisfy platform-specific constraints.
The glue driver may adjust the number of ob/ib windows, but the values
must stay within hardware limits.
Signed-off-by: Randolph Lin <randolph@andestech.com>
---
drivers/pci/controller/dwc/pcie-designware.c | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
index 89aad5a08928..56c1e45adc06 100644
--- a/drivers/pci/controller/dwc/pcie-designware.c
+++ b/drivers/pci/controller/dwc/pcie-designware.c
@@ -907,8 +907,16 @@ void dw_pcie_iatu_detect(struct dw_pcie *pci)
max = 0;
}
- pci->num_ob_windows = ob;
- pci->num_ib_windows = ib;
+ if (!pci->num_ob_windows)
+ pci->num_ob_windows = ob;
+ else if (pci->num_ob_windows > ob)
+ dev_err(pci->dev, "Adjusted ob windows exceed the limit\n");
+
+ if (!pci->num_ib_windows)
+ pci->num_ib_windows = ib;
+ else if (pci->num_ib_windows > ib)
+ dev_err(pci->dev, "Adjusted ib windows exceed the limit\n");
+
pci->region_align = 1 << fls(min);
pci->region_limit = (max << 32) | (SZ_4G - 1);
--
2.34.1
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next prev parent reply other threads:[~2025-10-03 2:40 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-03 2:35 [PATCH v6 0/5] Add support for Andes Qilai SoC PCIe controller Randolph Lin
2025-10-03 2:35 ` Randolph Lin [this message]
2025-10-14 9:43 ` [PATCH v6 1/5] PCI: dwc: Allow adjusting the number of ob/ib windows in glue driver Niklas Cassel
2025-10-16 11:12 ` Randolph Lin
2025-10-16 11:54 ` Niklas Cassel
2025-10-20 11:35 ` Randolph Lin
2025-10-03 2:35 ` [PATCH v6 2/5] dt-bindings: PCI: Add Andes QiLai PCIe support Randolph Lin
2025-10-06 18:52 ` Rob Herring
2025-10-03 2:35 ` [PATCH v6 3/5] riscv: dts: andes: Add PCIe node into the QiLai SoC Randolph Lin
2025-10-03 2:35 ` [PATCH v6 4/5] PCI: andes: Add Andes QiLai SoC PCIe host driver support Randolph Lin
2025-10-14 7:33 ` Dan Carpenter
2025-10-03 2:35 ` [PATCH v6 5/5] MAINTAINERS: Add maintainers for Andes QiLai PCIe driver Randolph Lin
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