From: Troy Mitchell <troy.mitchell@linux.dev>
To: Thomas Gleixner <tglx@linutronix.de>,
Paul Walmsley <pjw@kernel.org>,
Samuel Holland <samuel.holland@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>
Cc: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
Troy Mitchell <troy.mitchell@linux.dev>
Subject: [PATCH] irqchip/sifive-plic: use hartid as context_id in OF to fix AMP conflicts
Date: Mon, 20 Oct 2025 11:49:45 +0800 [thread overview]
Message-ID: <20251020-fix-plic-amp-v1-1-defe2a99ab80@linux.dev> (raw)
In asymmetric multi-processing (AMP) scenarios, the original PLIC
driver used the context loop index 'i' as context_id for OF (device
tree) platforms. This caused multiple contexts from different harts
(e.g., core0 and core4) to share the same enable_base, leading to
conflicts when initializing the PLIC.
This patch resolves enable_base conflicts on AMP platforms while
maintaining SMP/UP behavior.
Signed-off-by: Troy Mitchell <troy.mitchell@linux.dev>
---
drivers/irqchip/irq-sifive-plic.c | 23 ++++++++++++-----------
1 file changed, 12 insertions(+), 11 deletions(-)
diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
index cbd7697bc14819cbe3b77096b26901b605491f75..79867afcd321e42ad837adb5c15d0e1dc9e0e1b4 100644
--- a/drivers/irqchip/irq-sifive-plic.c
+++ b/drivers/irqchip/irq-sifive-plic.c
@@ -487,18 +487,18 @@ static int plic_parse_nr_irqs_and_contexts(struct fwnode_handle *fwnode,
}
static int plic_parse_context_parent(struct fwnode_handle *fwnode, u32 context,
- u32 *parent_hwirq, int *parent_cpu, u32 id)
+ u32 *parent_hwirq, int *parent_cpu, u32 id,
+ unsigned long *hartid)
{
struct of_phandle_args parent;
- unsigned long hartid;
int rc;
if (!is_of_node(fwnode)) {
- hartid = acpi_rintc_ext_parent_to_hartid(id, context);
- if (hartid == INVALID_HARTID)
+ *hartid = acpi_rintc_ext_parent_to_hartid(id, context);
+ if (*hartid == INVALID_HARTID)
return -EINVAL;
- *parent_cpu = riscv_hartid_to_cpuid(hartid);
+ *parent_cpu = riscv_hartid_to_cpuid(*hartid);
*parent_hwirq = RV_IRQ_EXT;
return 0;
}
@@ -507,19 +507,19 @@ static int plic_parse_context_parent(struct fwnode_handle *fwnode, u32 context,
if (rc)
return rc;
- rc = riscv_of_parent_hartid(parent.np, &hartid);
+ rc = riscv_of_parent_hartid(parent.np, hartid);
if (rc)
return rc;
*parent_hwirq = parent.args[0];
- *parent_cpu = riscv_hartid_to_cpuid(hartid);
+ *parent_cpu = riscv_hartid_to_cpuid(*hartid);
return 0;
}
static int plic_probe(struct fwnode_handle *fwnode)
{
int error = 0, nr_contexts, nr_handlers = 0, cpu, i;
- unsigned long plic_quirks = 0;
+ unsigned long plic_quirks = 0, hartid;
struct plic_handler *handler;
u32 nr_irqs, parent_hwirq;
struct plic_priv *priv;
@@ -569,14 +569,14 @@ static int plic_probe(struct fwnode_handle *fwnode)
for (i = 0; i < nr_contexts; i++) {
error = plic_parse_context_parent(fwnode, i, &parent_hwirq, &cpu,
- priv->acpi_plic_id);
+ priv->acpi_plic_id, &hartid);
if (error) {
pr_warn("%pfwP: hwirq for context%d not found\n", fwnode, i);
continue;
}
if (is_of_node(fwnode)) {
- context_id = i;
+ context_id = hartid * 2 + i % 2;
} else {
context_id = acpi_rintc_get_plic_context(priv->acpi_plic_id, i);
if (context_id == INVALID_CONTEXT) {
@@ -694,7 +694,8 @@ static int plic_probe(struct fwnode_handle *fwnode)
fail_cleanup_contexts:
for (i = 0; i < nr_contexts; i++) {
- if (plic_parse_context_parent(fwnode, i, &parent_hwirq, &cpu, priv->acpi_plic_id))
+ if (plic_parse_context_parent(fwnode, i, &parent_hwirq, &cpu,
+ priv->acpi_plic_id, &hartid))
continue;
if (parent_hwirq != RV_IRQ_EXT || cpu < 0)
continue;
---
base-commit: fdbc36b17e9f2fa24c940959e39df90f53ccce2b
change-id: 20251020-fix-plic-amp-72bd94969ca4
Best regards,
--
Troy Mitchell <troy.mitchell@linux.dev>
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next reply other threads:[~2025-10-20 3:51 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-20 3:49 Troy Mitchell [this message]
2025-10-20 17:44 ` [PATCH] irqchip/sifive-plic: use hartid as context_id in OF to fix AMP conflicts Thomas Gleixner
2025-10-21 1:14 ` Troy Mitchell
2025-10-21 18:23 ` Thomas Gleixner
2025-10-23 6:09 ` Troy Mitchell
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