From: Longbin Li <looong.bin@gmail.com>
To: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Chen Wang <unicorn_wang@outlook.com>,
Inochi Amaoto <inochiama@gmail.com>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Alexander Sverdlin <alexander.sverdlin@gmail.com>,
Thomas Bonnefille <thomas.bonnefille@bootlin.com>,
Ze Huang <huangze@whut.edu.cn>
Cc: Longbin Li <looong.bin@gmail.com>,
devicetree@vger.kernel.org, sophgo@lists.linux.dev,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: [PATCH v2 3/3] riscv: dts: sophgo: Add USB support for cv18xx
Date: Mon, 20 Oct 2025 16:38:33 +0800 [thread overview]
Message-ID: <20251020083838.67522-4-looong.bin@gmail.com> (raw)
In-Reply-To: <20251020083838.67522-1-looong.bin@gmail.com>
Add USB controller node for cv18xx and enable it for Huashan Pi, milkv-duo.
Co-authored-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Longbin Li <looong.bin@gmail.com>
---
arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts | 5 +++++
arch/riscv/boot/dts/sophgo/cv180x.dtsi | 16 ++++++++++++++++
.../riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts | 5 +++++
.../boot/dts/sophgo/sg2002-licheerv-nano-b.dts | 5 +++++
4 files changed, 31 insertions(+)
diff --git a/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
index 9feb520eaec4..0e6d79e6e3a4 100644
--- a/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
+++ b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
@@ -100,3 +100,8 @@ &uart0 {
pinctrl-names = "default";
status = "okay";
};
+
+&usb {
+ dr_mode = "host";
+ status = "okay";
+};
diff --git a/arch/riscv/boot/dts/sophgo/cv180x.dtsi b/arch/riscv/boot/dts/sophgo/cv180x.dtsi
index 42303acb2b39..1b2b1969a648 100644
--- a/arch/riscv/boot/dts/sophgo/cv180x.dtsi
+++ b/arch/riscv/boot/dts/sophgo/cv180x.dtsi
@@ -432,6 +432,22 @@ dmac: dma-controller@4330000 {
status = "disabled";
};
+ usb: usb@4340000 {
+ compatible = "sophgo,cv1800b-usb";
+ reg = <0x04340000 0x10000>;
+ clocks = <&clk CLK_AXI4_USB>, <&clk CLK_APB_USB>;
+ clock-names = "otg", "utmi";
+ g-np-tx-fifo-size = <32>;
+ g-rx-fifo-size = <536>;
+ g-tx-fifo-size = <768 512 512 384 128 128>;
+ interrupts = <SOC_PERIPHERAL_IRQ(14) IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&usbphy>;
+ phy-names = "usb2-phy";
+ resets = <&rst RST_USB>;
+ reset-names = "dwc2";
+ status = "disabled";
+ };
+
rtc@5025000 {
compatible = "sophgo,cv1800b-rtc", "syscon";
reg = <0x5025000 0x2000>;
diff --git a/arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts b/arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts
index 4a5835fa9e96..aedf79f47407 100644
--- a/arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts
+++ b/arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts
@@ -86,3 +86,8 @@ &sdhci1 {
&uart0 {
status = "okay";
};
+
+&usb {
+ dr_mode = "host";
+ status = "okay";
+};
diff --git a/arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dts b/arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dts
index 86a712b953a5..b1853770d017 100644
--- a/arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dts
+++ b/arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dts
@@ -93,3 +93,8 @@ &uart0 {
pinctrl-names = "default";
status = "okay";
};
+
+&usb {
+ dr_mode = "host";
+ status = "okay";
+};
--
2.51.0
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next prev parent reply other threads:[~2025-10-20 8:40 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-20 8:38 [PATCH v2 0/3] riscv: sophgo: add top syscon device for cv18xx Longbin Li
2025-10-20 8:38 ` [PATCH v2 1/3] dt-bindings: soc: sophgo: add TOP syscon for CV18XX/SG200X series SoC Longbin Li
2025-10-20 10:05 ` Krzysztof Kozlowski
2025-10-20 8:38 ` [PATCH v2 2/3] riscv: dts: sophgo: Add syscon node for cv18xx Longbin Li
2025-10-20 10:05 ` Krzysztof Kozlowski
2025-10-23 21:18 ` Alexander Sverdlin
2025-10-20 8:38 ` Longbin Li [this message]
2025-10-23 21:19 ` [PATCH v2 3/3] riscv: dts: sophgo: Add USB support " Alexander Sverdlin
2025-10-20 10:04 ` [PATCH v2 0/3] riscv: sophgo: add top syscon device " Krzysztof Kozlowski
2025-10-21 9:35 ` Longbin Li
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