From: Alex Elder <elder@riscstar.com>
To: dlan@gentoo.org, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org
Cc: Frank.li@nxp.com, guodong@riscstar.com, pjw@kernel.org,
palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr,
devicetree@vger.kernel.org, spacemit@lists.linux.dev,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH v3 8/9] riscv: dts: spacemit: enable K1 SoC QSPI on BPI-F3
Date: Fri, 24 Oct 2025 14:15:48 -0500 [thread overview]
Message-ID: <20251024191550.194946-9-elder@riscstar.com> (raw)
In-Reply-To: <20251024191550.194946-1-elder@riscstar.com>
Define DTS nodes to enable support for QSPI on the K1 SoC, including the
pin control configuration used. Enable QSPI on the Banana Pi BPI-F3 board.
Signed-off-by: Alex Elder <elder@riscstar.com>
---
.../boot/dts/spacemit/k1-bananapi-f3.dts | 6 ++++++
arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi | 21 +++++++++++++++++++
arch/riscv/boot/dts/spacemit/k1.dtsi | 16 ++++++++++++++
3 files changed, 43 insertions(+)
diff --git a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
index 33ca816bfd4b3..02f218a16318e 100644
--- a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
+++ b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
@@ -113,6 +113,12 @@ &pdma {
status = "okay";
};
+&qspi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&qspi_cfg>;
+ status = "okay";
+};
+
&i2c2 {
pinctrl-0 = <&i2c2_0_cfg>;
pinctrl-names = "default";
diff --git a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
index 4eef81d583f3d..e922e05ff856d 100644
--- a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
+++ b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
@@ -73,6 +73,27 @@ i2c8-0-pins {
};
};
+ qspi_cfg: qspi-cfg {
+ qspi-pins {
+ pinmux = <K1_PADCONF(98, 0)>, /* QSPI_DATA3 */
+ <K1_PADCONF(99, 0)>, /* QSPI_DATA2 */
+ <K1_PADCONF(100, 0)>, /* QSPI_DATA1 */
+ <K1_PADCONF(101, 0)>, /* QSPI_DATA0 */
+ <K1_PADCONF(102, 0)>; /* QSPI_CLK */
+
+ bias-disable;
+ drive-strength = <19>;
+ power-source = <3300>;
+ };
+
+ qspi-cs1-pins {
+ pinmux = <K1_PADCONF(103, 0)>; /* QSPI_CS1 */
+ bias-pull-up = <0>;
+ drive-strength = <19>;
+ power-source = <3300>;
+ };
+ };
+
/omit-if-no-ref/
uart0_0_cfg: uart0-0-cfg {
uart0-0-pins {
diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi
index af35f9cd64351..47f97105bff0b 100644
--- a/arch/riscv/boot/dts/spacemit/k1.dtsi
+++ b/arch/riscv/boot/dts/spacemit/k1.dtsi
@@ -823,6 +823,22 @@ uart9: serial@d4017800 {
status = "disabled";
};
+ qspi: spi@d420c000 {
+ compatible = "spacemit,k1-qspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0xd420c000 0x0 0x1000>,
+ <0x0 0xb8000000 0x0 0xc00000>;
+ reg-names = "QuadSPI", "QuadSPI-memory";
+ clocks = <&syscon_apmu CLK_QSPI_BUS>,
+ <&syscon_apmu CLK_QSPI>;
+ clock-names = "qspi_en", "qspi";
+ resets = <&syscon_apmu RESET_QSPI>,
+ <&syscon_apmu RESET_QSPI_BUS>;
+ interrupts = <117>;
+ status = "disabled";
+ };
+
/* sec_uart1: 0xf0612000, not available from Linux */
};
--
2.48.1
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next prev parent reply other threads:[~2025-10-24 19:16 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-24 19:15 [PATCH v3 0/9] spi: enable the SpacemiT K1 SoC QSPI Alex Elder
2025-10-24 19:15 ` [PATCH v3 1/9] dt-bindings: spi: fsl-qspi: support SpacemiT K1 Alex Elder
2025-10-24 19:15 ` [PATCH v3 2/9] dt-bindings: spi: fsl-qspi: add optional resets Alex Elder
2025-10-24 21:23 ` Frank Li
2025-10-24 19:15 ` [PATCH v3 3/9] spi: fsl-qspi: add optional reset support Alex Elder
2025-10-24 19:15 ` [PATCH v3 4/9] spi: fsl-qspi: switch predicates to bool Alex Elder
2025-10-24 21:24 ` Frank Li
2025-10-24 19:15 ` [PATCH v3 5/9] spi: fsl-qspi: add a clock disable quirk Alex Elder
2025-10-24 21:25 ` Frank Li
2025-10-24 19:15 ` [PATCH v3 6/9] spi: fsl-qspi: introduce sfa_size devtype data Alex Elder
2025-10-24 19:15 ` [PATCH v3 7/9] spi: fsl-qspi: support the SpacemiT K1 SoC Alex Elder
2025-10-24 19:15 ` Alex Elder [this message]
2025-10-24 19:15 ` [PATCH v3 9/9] riscv: defconfig: enable SPI_FSL_QUADSPI as a module Alex Elder
2025-10-25 7:06 ` Paul Walmsley
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