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Thu, 30 Oct 2025 06:57:15 -0700 (PDT) Received: from J9GPGXL7NT.bytedance.net ([61.213.176.55]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-29498e495e8sm187071905ad.110.2025.10.30.06.57.11 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 30 Oct 2025 06:57:15 -0700 (PDT) From: Xu Lu To: pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, apatel@ventanamicro.com, guoren@kernel.org Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Xu Lu Subject: [RFC PATCH v1 3/4] riscv: mm: Enqueue tlbflush info if task is not running on target cpu Date: Thu, 30 Oct 2025 21:56:51 +0800 Message-ID: <20251030135652.63837-4-luxu.kernel@bytedance.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20251030135652.63837-1-luxu.kernel@bytedance.com> References: <20251030135652.63837-1-luxu.kernel@bytedance.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251030_065717_014593_AEF3CF37 X-CRM114-Status: GOOD ( 11.67 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org When need to flush tlb of a remote cpu, we only send ipi to the target cpu if the task is currently running on it. Otherwise, we only enqueue the tlb flush info in target cpu's tlb flush queue. Signed-off-by: Xu Lu --- arch/riscv/mm/tlbflush.c | 30 +++++++++++++++++++++++++++++- 1 file changed, 29 insertions(+), 1 deletion(-) diff --git a/arch/riscv/mm/tlbflush.c b/arch/riscv/mm/tlbflush.c index aa8f1304ae5c4..f4333c3a6d251 100644 --- a/arch/riscv/mm/tlbflush.c +++ b/arch/riscv/mm/tlbflush.c @@ -115,6 +115,32 @@ DEFINE_PER_CPU(struct tlb_flush_queue, tlb_flush_queue) = { .len = 0, }; +static bool should_ipi_flush(int cpu, void *info) +{ + struct tlb_flush_queue *queue = per_cpu_ptr(&tlb_flush_queue, cpu); + struct flush_tlb_range_data *d = info; + unsigned long flags; + + if (per_cpu(loaded_asid, cpu) == d->asid) + return true; + + raw_spin_lock_irqsave(&queue->lock, flags); + if (queue->len < TLB_FLUSH_QUEUE_SIZE) { + queue->tasks[queue->len] = *d; + queue->len++; + } else { + raw_spin_unlock_irqrestore(&queue->lock, flags); + return true; + } + raw_spin_unlock_irqrestore(&queue->lock, flags); + + /* Recheck whether loaded_asid changed during enqueueing task */ + if (per_cpu(loaded_asid, cpu) == d->asid) + return true; + + return false; +} + static void __ipi_flush_tlb_range_asid(void *info) { struct flush_tlb_range_data *d = info; @@ -152,7 +178,9 @@ static void __flush_tlb_range(struct mm_struct *mm, ftd.start = start; ftd.size = size; ftd.stride = stride; - on_each_cpu_mask(cmask, __ipi_flush_tlb_range_asid, &ftd, 1); + on_each_cpu_cond_mask(should_ipi_flush, + __ipi_flush_tlb_range_asid, + &ftd, 1, cmask); } put_cpu(); -- 2.20.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv