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Sat, 01 Nov 2025 08:43:02 -0700 (PDT) Received: from localhost.localdomain ([122.171.20.36]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-295269bd2fesm59990105ad.105.2025.11.01.08.42.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 01 Nov 2025 08:43:01 -0700 (PDT) From: Anup Patel To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Greg KH , Alexander Shishkin , Ian Rogers Subject: [PATCH v2 00/12] Linux RISC-V trace framework and drivers Date: Sat, 1 Nov 2025 21:12:33 +0530 Message-ID: <20251101154245.162492-1-apatel@ventanamicro.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251101_084303_838263_9426B0A4 X-CRM114-Status: GOOD ( 17.54 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Alexandre Ghiti , Atish Patra , Peter Zijlstra , Anup Patel , Adrian Hunter , linux-kernel@vger.kernel.org, Ingo Molnar , Jiri Olsa , Anup Patel , Mayuresh Chitale , Namhyung Kim , linux-riscv@lists.infradead.org, Andrew Jones , Liang Kan Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org This series adds initial support for RISC-V trace framework and drivers. The RISC-V trace v1.0 specification is already ratified and can be found at: https://github.com/riscv-non-isa/e-trace-encap/releases/tag/v1.0.0-ratified https://github.com/riscv-non-isa/tg-nexus-trace/releases/tag/1.0_Ratified The RISC-V trace framework and drivers are designed to be agnostic to the underlying trace protocol hence both RISC-V E-trace and RISC-V N-trace should work fine. The discovery of trace protocl parameters are left to user-space trace decoder. In ther future, there will be subsequent series adding: 1) Sysfs support 2) ACPI support 3) More trace drivers (such as funnel, ATB, etc) 4) Support for upcoming self-hosted trace specification 5) ... and more ... These patches can also be found in the riscv_trace_support_v2 branch at: https://github.com/avpatel/linux.git To test the patches, we need QEMU virt machine with RISC-V trace support which can be found in rv-etrace branch at: https://gitlab.com/danielhb/qemu.git To capture rvtrace data using perf on QEMU virt machine do the following: 1) Launch QEMU virt machine $ qemu-system-riscv64 -nographic -M virt -smp 2 -bios fw_dynamic.bin \ -kernel Image -append "root=/dev/vda rw console=ttyS0 earlycon=sbi" \ -drive file=/path/to/rootfs.img,id=disk1,if=none,format=raw \ -device virtio-blk-device,drive=disk1 2) Run perf record to capture rvtrace data $ perf record --all-cpus -e rvtrace/event=0x1/ 3) The step2 would create a perf.data file which has the rvtrace data. Now run perf report -D and look for PERF_RECORD_AUXTRACE event section(s) which point(s) to the actual rvtrace data offset. Changes since v1: - Rebased on Linux-6.18-rc3 - Addressed Rob's comments in dt-bindings added by PATCH1 - Get reference of conn->dest_fwnode and add missing break in rvtrace_of_parse_outconns() of rvtrace-platform drivers added by PATCH2 - Added new inline function rvtrace_comp_is_empty() in PATCH2 and used it in rvtrace_encoder_stop() added by PATCH5 - Fixed trRamWPLow usage in PATCH7 - Determine RAM sink buffer size based on component implementation ID and reduce default RAM sink buffer size to 1MB - Add new PATCH8 to enable DMA_RESTRICTED_POOL in RISC-V defconfig so that implementations with RAM sink address restrictions can be handled. Anup Patel (6): dt-bindings: Add RISC-V trace component bindings rvtrace: Initial implementation of driver framework rvtrace: Add functions to create/destroy a trace component path rvtrace: Add function to copy into perf AUX buffer riscv: Enable DMA_RESTRICTED_POOL in defconfig MAINTAINERS: Add entry for RISC-V trace framework and drivers Mayuresh Chitale (6): rvtrace: Add functions to start/stop tracing on a component path rvtrace: Add trace encoder driver rvtrace: Add trace ramsink driver rvtrace: Add perf driver for tracing using perf tool perf tools: Add RISC-V trace PMU record capabilities perf tools: Initial support for RISC-V trace decoder .../bindings/riscv/riscv,trace-component.yaml | 112 +++ MAINTAINERS | 11 + arch/riscv/configs/defconfig | 1 + drivers/Makefile | 1 + drivers/hwtracing/Kconfig | 2 + drivers/hwtracing/rvtrace/Kconfig | 33 + drivers/hwtracing/rvtrace/Makefile | 6 + drivers/hwtracing/rvtrace/rvtrace-core.c | 798 ++++++++++++++++++ drivers/hwtracing/rvtrace/rvtrace-encoder.c | 107 +++ drivers/hwtracing/rvtrace/rvtrace-perf.c | 343 ++++++++ drivers/hwtracing/rvtrace/rvtrace-platform.c | 192 +++++ drivers/hwtracing/rvtrace/rvtrace-ramsink.c | 262 ++++++ include/linux/rvtrace.h | 349 ++++++++ tools/perf/arch/riscv/util/Build | 1 + tools/perf/arch/riscv/util/auxtrace.c | 218 +++++ tools/perf/util/Build | 1 + tools/perf/util/auxtrace.c | 4 + tools/perf/util/auxtrace.h | 1 + tools/perf/util/rvtrace-decoder.c | 91 ++ tools/perf/util/rvtrace.h | 20 + 20 files changed, 2553 insertions(+) create mode 100644 Documentation/devicetree/bindings/riscv/riscv,trace-component.yaml create mode 100644 drivers/hwtracing/rvtrace/Kconfig create mode 100644 drivers/hwtracing/rvtrace/Makefile create mode 100644 drivers/hwtracing/rvtrace/rvtrace-core.c create mode 100644 drivers/hwtracing/rvtrace/rvtrace-encoder.c create mode 100644 drivers/hwtracing/rvtrace/rvtrace-perf.c create mode 100644 drivers/hwtracing/rvtrace/rvtrace-platform.c create mode 100644 drivers/hwtracing/rvtrace/rvtrace-ramsink.c create mode 100644 include/linux/rvtrace.h create mode 100644 tools/perf/arch/riscv/util/auxtrace.c create mode 100644 tools/perf/util/rvtrace-decoder.c create mode 100644 tools/perf/util/rvtrace.h -- 2.43.0 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv