Re: [GIT PULL] Anlogic Platform Initial Support

[Conor Dooley <conor@kernel.org>]

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On Wed, Nov 19, 2025 at 07:41:34PM +0000, Conor Dooley wrote:
> Hey folks,
> 
> This is my first PR for 6.19, and it's a wee bit in advance of the
> others just in case there's some objection that needs reworking.
> Krzysztof is probably already aware of what's going on here, but I threw
> the toys of the pram over the behaviour of the vendor here, and so
> appointed myself maintainer after the submitter decided they were not
> comfortable doing so any more. You can read the context here if you like:
> https://lore.kernel.org/all/20250922-dr1v90-basic-dt-v2-0-64d28500cb37@pigmoral.tech/
> I'm only there as Odd Fixes, and I hope that I can eventually hand this
> over to someone who cares about it specifically.
> I consider what's here to otherwise be a bit on the premature side, with
> no clock, reset or pinctrl drivers, but the submitter of the initial support
> is currently working on that and I figured sorting out the maintainer
> thing made sending it at this point worthwhile.

Stephen pointed out last night that the MAINTAINERS entry was in the
wrong place. Here's an updated PR:

The following changes since commit 3a8660878839faadb4f1a6dd72c3179c1df56787:

  Linux 6.18-rc1 (2025-10-12 13:42:36 -0700)

are available in the Git repository at:

  https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ tags/anlogic-initial-6.19-v2

for you to fetch changes up to d5c3f49b75832553ba0dafabc2d394a885106498:

  MAINTAINERS: Setup support for Anlogic tree (2025-11-20 09:48:13 +0000)

----------------------------------------------------------------
Initial Anlogic Platform Support

Add bindings for the serial and timer peripherals, and a basic soc dtsi
for the Anlogic dr1v90 SoC. The Milianke MLKPAI FS01 is the first board
for this SoC. Add myself as maintainer for this platform for the time
being.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

----------------------------------------------------------------
Conor Dooley (1):
      MAINTAINERS: Setup support for Anlogic tree

Junhui Liu (9):
      dt-bindings: vendor-prefixes: Add Anlogic, Milianke and Nuclei
      dt-bindings: riscv: Add Nuclei UX900 compatibles
      dt-bindings: riscv: Add Anlogic DR1V90
      dt-bindings: timer: Add Anlogic DR1V90 ACLINT MTIMER
      dt-bindings: serial: snps-dw-apb-uart: Add Anlogic DR1V90 uart
      riscv: Add Anlogic SoC famly Kconfig support
      riscv: dts: Add initial Anlogic DR1V90 SoC device tree
      riscv: dts: anlogic: Add Milianke MLKPAI FS01 board
      riscv: defconfig: Enable Anlogic SoC

 Documentation/devicetree/bindings/riscv/anlogic.yaml                  |  27 +++++++++++++++++++++++++++
 Documentation/devicetree/bindings/riscv/cpus.yaml                     |   1 +
 Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml        |   1 +
 Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml |  17 +++++++++++------
 Documentation/devicetree/bindings/vendor-prefixes.yaml                |   6 ++++++
 MAINTAINERS                                                           |   8 ++++++++
 arch/riscv/Kconfig.socs                                               |   5 +++++
 arch/riscv/boot/dts/Makefile                                          |   1 +
 arch/riscv/boot/dts/anlogic/Makefile                                  |   2 ++
 arch/riscv/boot/dts/anlogic/dr1v90-mlkpai-fs01.dts                    |  28 ++++++++++++++++++++++++++++
 arch/riscv/boot/dts/anlogic/dr1v90.dtsi                               | 100 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 arch/riscv/configs/defconfig                                          |   1 +
 12 files changed, 191 insertions(+), 6 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/riscv/anlogic.yaml
 create mode 100644 arch/riscv/boot/dts/anlogic/Makefile
 create mode 100644 arch/riscv/boot/dts/anlogic/dr1v90-mlkpai-fs01.dts
 create mode 100644 arch/riscv/boot/dts/anlogic/dr1v90.dtsi

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