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boundary="===============1410950933553634515==" Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org --===============1410950933553634515== Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="AcVI3kJ2wz21qqy0" Content-Disposition: inline --AcVI3kJ2wz21qqy0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Sun, Nov 23, 2025 at 02:50:45PM -0800, E Shattow wrote: > From: Icenowy Zheng >=20 > Orange Pi RV is a SBC based on the StarFive VisionFive 2 board. >=20 > Orange Pi RV features: >=20 > - StarFive JH7110 SoC > - GbE port connected to JH7110 GMAC0 via YT8531 PHY > - 4x USB ports via VL805 PCIe USB controller connected to JH7110 pcie0 > - M.2 M-key slot connected to JH7110 pcie1 > - HDMI video output > - 3.5mm audio output > - Ampak AP6256 SDIO Wi-Fi/Bluetooth module on mmc0 > - microSD slot on mmc1 > - SPI NOR flash memory > - 24c02 EEPROM (read only by default) >=20 > Signed-off-by: Icenowy Zheng > Signed-off-by: E Shattow > --- > arch/riscv/boot/dts/starfive/Makefile | 1 + > .../boot/dts/starfive/jh7110-orangepi-rv.dts | 76 +++++++++++++++++++ > 2 files changed, 77 insertions(+) > create mode 100644 arch/riscv/boot/dts/starfive/jh7110-orangepi-rv.dts >=20 > diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/= starfive/Makefile > index 62b659f89ba7..d34c8c79bc10 100644 > --- a/arch/riscv/boot/dts/starfive/Makefile > +++ b/arch/riscv/boot/dts/starfive/Makefile > @@ -12,6 +12,7 @@ dtb-$(CONFIG_ARCH_STARFIVE) +=3D jh7110-deepcomputing-f= ml13v01.dtb > dtb-$(CONFIG_ARCH_STARFIVE) +=3D jh7110-milkv-mars.dtb > dtb-$(CONFIG_ARCH_STARFIVE) +=3D jh7110-milkv-marscm-emmc.dtb > dtb-$(CONFIG_ARCH_STARFIVE) +=3D jh7110-milkv-marscm-lite.dtb > +dtb-$(CONFIG_ARCH_STARFIVE) +=3D jh7110-orangepi-rv.dtb > dtb-$(CONFIG_ARCH_STARFIVE) +=3D jh7110-pine64-star64.dtb > dtb-$(CONFIG_ARCH_STARFIVE) +=3D jh7110-starfive-visionfive-2-v1.2a.dtb > dtb-$(CONFIG_ARCH_STARFIVE) +=3D jh7110-starfive-visionfive-2-v1.3b.dtb > diff --git a/arch/riscv/boot/dts/starfive/jh7110-orangepi-rv.dts b/arch/r= iscv/boot/dts/starfive/jh7110-orangepi-rv.dts > new file mode 100644 > index 000000000000..16ec2767134e > --- /dev/null > +++ b/arch/riscv/boot/dts/starfive/jh7110-orangepi-rv.dts > @@ -0,0 +1,76 @@ > +// SPDX-License-Identifier: GPL-2.0 OR MIT > +/* > + * Copyright (C) 2025 Icenowy Zheng > + */ > + > +/dts-v1/; > +#include "jh7110-common.dtsi" > + > +/ { > + model =3D "Xunlong Orange Pi RV"; > + compatible =3D "xunlong,orangepi-rv", "starfive,jh7110"; > + > + /* This regulator is always on by hardware */ > + reg_vcc3v3_pcie: regulator-vcc3v3-pcie { > + compatible =3D "regulator-fixed"; > + regulator-name =3D "vcc3v3-pcie"; > + regulator-min-microvolt =3D <3300000>; > + regulator-max-microvolt =3D <3300000>; > + regulator-always-on; > + }; > + > + wifi_pwrseq: wifi-pwrseq { > + compatible =3D "mmc-pwrseq-simple"; > + reset-gpios =3D <&sysgpio 62 GPIO_ACTIVE_LOW>; > + }; > +}; > + > +&gmac0 { > + assigned-clocks =3D <&aoncrg JH7110_AONCLK_GMAC0_TX>; > + assigned-clock-parents =3D <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>; > + starfive,tx-use-rgmii-clk; > + status =3D "okay"; > +}; > + > +&mmc0 { > + #address-cells =3D <1>; > + #size-cells =3D <0>; > + cap-sd-highspeed; > + mmc-pwrseq =3D <&wifi_pwrseq>; > + vmmc-supply =3D <®_vcc3v3_pcie>; > + vqmmc-supply =3D <&vcc_3v3>; > + status =3D "okay"; > + > + ap6256: wifi@1 { > + compatible =3D "brcm,bcm43456-fmac", "brcm,bcm4329-fmac"; > + reg =3D <1>; > + /* TODO: out-of-band IRQ on GPIO21 */ What's up with this TODO? Why's the gpio not here? Missing binding support, missing driver support? > + }; > +}; > + > +&mmc1 { > + cd-gpios =3D <&sysgpio 41 GPIO_ACTIVE_HIGH>; > +}; > + > +&pcie0 { > + status =3D "okay"; > +}; > + > +&pcie1 { > + status =3D "okay"; > +}; > + > +&phy0 { > + rx-internal-delay-ps =3D <1500>; > + tx-internal-delay-ps =3D <1500>; > + motorcomm,rx-clk-drv-microamp =3D <3970>; > + motorcomm,rx-data-drv-microamp =3D <2910>; > + motorcomm,tx-clk-adj-enabled; > + motorcomm,tx-clk-10-inverted; > + motorcomm,tx-clk-100-inverted; > + motorcomm,tx-clk-1000-inverted; > +}; > + > +&pwmdac { > + status =3D "okay"; > +}; > --=20 > 2.50.0 >=20 --AcVI3kJ2wz21qqy0 Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCaSQ8dwAKCRB4tDGHoIJi 0gKUAQCHaNEzOZ4qPXve3F2aeeKYpr5+2ZMIrhOuqdqsunZydQD9HJ0x2Rvd/w8u spF+ZiVUHgtIjbLiGLjxeUxS6sSKFAE= =I8Fj -----END PGP SIGNATURE----- --AcVI3kJ2wz21qqy0-- --===============1410950933553634515== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv --===============1410950933553634515==--