Re: [PATCH] riscv: dts: canaan: Add K230 clock provider DTSI

From: Conor Dooley <conor@kernel.org>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: q691800735@163.com, linux-riscv@lists.infradead.org,
	devicetree@vger.kernel.org, robh@kernel.org, krzk+dt@kernel.org,
	pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu,
	alex@ghiti.fr, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] riscv: dts: canaan: Add K230 clock provider DTSI
Date: Wed, 3 Dec 2025 09:59:33 +0000	[thread overview]
Message-ID: <20251203-glowing-janitor-7220bf3bcadc@spud> (raw)
In-Reply-To: <935ab772-fc9d-443b-8c8d-f2d17f9259aa@kernel.org>

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On Wed, Dec 03, 2025 at 10:50:18AM +0100, Krzysztof Kozlowski wrote:
> On 03/12/2025 10:26, q691800735@163.com wrote:
> > From: jybruceupup <q691800735@163.com>
> > 
> > Add clock provider DTSI for Kendryte K230 SoC, required for subsystem
> > clock management and boot.
> > 
> > Signed-off-by: jybruceupup <q691800735@163.com>
> > ---
> >  .../boot/dts/canaan/k230_clock_provider.dtsi  | 2724 +++++++++++++++++
> >  1 file changed, 2724 insertions(+)
> >  create mode 100644 arch/riscv/boot/dts/canaan/k230_clock_provider.dtsi
> > 
> > diff --git a/arch/riscv/boot/dts/canaan/k230_clock_provider.dtsi b/arch/riscv/boot/dts/canaan/k230_clock_provider.dtsi
> > new file mode 100644
> > index 000000000..9d193ca22
> > --- /dev/null
> > +++ b/arch/riscv/boot/dts/canaan/k230_clock_provider.dtsi
> > @@ -0,0 +1,2724 @@
> > +// SPDX-License-Identifier: GPL-2.0 OR MIT
> > +/*
> > + * Copyright (c) 2023, Canaan Bright Sight Co., Ltd
> > + * Copyright (c) 2025 jybruceupup <q691800735@163.com>
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License version 2 as
> > + * published by the Free Software Foundation.
> > + */
> > +
> > +&sysctl_boot {
> > +/* osc24m clock */
> > +	osc24m: osc24m {
> > +		#clock-cells		= <0>;	/* only one clock output */
> > +		compatible		= "fixed-clock";/* It's clock source, no parent */
> > +		clock-frequency		= <24000000>;	/* clock freqence is 24MHz */
> > +		clock-accuracy		= <0>;	/* software assume clock no jitter/wander.*/
> > +		status				= "okay";
> > +		read-only			= <0>;
> > +	};
> > +
> > +	/* pll clock */
> > +	pll0: pll0 {
> 
> 
> NAK.
> 
> Not at all Linux style (actually DTS coding style), not used, no benefit
> of any of this.

I don't really understand what jybryceupup is doing here, because there
is someone actually working on a clk driver etc that is in a pretty good
state.

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