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Mon, 22 Dec 2025 05:07:39 -0800 (PST) Received: from [127.0.1.1] ([2a12:a305:4::402f]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-34e70c932casm12970405a91.0.2025.12.22.05.07.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Dec 2025 05:07:39 -0800 (PST) From: Guodong Xu Date: Mon, 22 Dec 2025 21:04:17 +0800 Subject: [PATCH v2 07/13] dt-bindings: riscv: Add B ISA extension description MIME-Version: 1.0 Message-Id: <20251222-k3-basic-dt-v2-7-3af3f3cd0f8a@riscstar.com> References: <20251222-k3-basic-dt-v2-0-3af3f3cd0f8a@riscstar.com> In-Reply-To: <20251222-k3-basic-dt-v2-0-3af3f3cd0f8a@riscstar.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Yixun Lan , Daniel Lezcano , Thomas Gleixner , Samuel Holland , Anup Patel , Greg Kroah-Hartman , Jiri Slaby , Lubomir Rintel , Yangyu Chen Cc: Paul Walmsley , Conor Dooley , Heinrich Schuchardt , Kevin Meng Zhang , Anup Patel , Andrew Jones , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, spacemit@lists.linux.dev, linux-serial@vger.kernel.org, Guodong Xu X-Mailer: b4 0.14.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251222_050740_550499_2B9007C1 X-CRM114-Status: UNSURE ( 8.28 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Add description of the single-letter "B" extennsion for Bit Manipulation. B is mandatory for RVA23U64. The B extension is ratified in the 20240411 version of the unprivileged ISA specification. According to the ratified spec, "the B standard extension comprises instructions provided by the Zba, Zbb, and Zbs extensions. Hence add a schema check rule to enforce that B implies Zba, Zbb and Zbs. Signed-off-by: Guodong Xu --- v2: New patch. --- .../devicetree/bindings/riscv/extensions.yaml | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml index 565cb2cbb49b552959392810a9b731b43346a594..385e1deb23996d294e7662693f1257f910a6e129 100644 --- a/Documentation/devicetree/bindings/riscv/extensions.yaml +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml @@ -109,6 +109,13 @@ properties: The standard C extension for compressed instructions, as ratified in the 20191213 version of the unprivileged ISA specification. + - const: b + description: + The standard B extension for bit manipulation instructions, as + ratified in the 20240411 version of the unprivileged ISA + specification. The B standard extension comprises instructions + provided by the Zba, Zbb, and Zbs extensions. + - const: v description: The standard V extension for vector operations, as ratified @@ -735,6 +742,18 @@ properties: then: contains: const: f + # b comprises the following extensions + - if: + contains: + const: b + then: + allOf: + - contains: + const: zba + - contains: + const: zbb + - contains: + const: zbs # Zcb depends on Zca - if: contains: -- 2.43.0 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv