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Wed, 07 Jan 2026 09:51:41 -0800 (PST) Received: from localhost ([140.82.166.162]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-3ffa4de8cbfsm3524574fac.3.2026.01.07.09.51.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Jan 2026 09:51:41 -0800 (PST) Date: Wed, 7 Jan 2026 11:51:40 -0600 From: Andrew Jones To: Xu Lu Cc: Jason Gunthorpe , Zong Li , Tomasz Jeznach , joro@8bytes.org, Will Deacon , Robin Murphy , Anup Patel , atish.patra@linux.dev, Thomas Gleixner , alex.williamson@redhat.com, Paul Walmsley , Palmer Dabbelt , Alexandre Ghiti , iommu@lists.linux.dev, kvm-riscv@lists.infradead.org, kvm@vger.kernel.org, linux-riscv , LKML Subject: Re: Question about RISCV IOMMU irqbypass patch series Message-ID: <20260107-dc4b5f1d879db9afb00a4a87@orel> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260107_095143_775309_BBC4907D X-CRM114-Status: GOOD ( 18.40 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Wed, Jan 07, 2026 at 06:01:26PM +0800, Xu Lu wrote: > Hi Andrew, > > Thanks for your brilliant job on the RISCV IOMMU irqbypass patch > series[1]. I have rebased it on v6.18 and successfully passed through > a nvme device to VM. But I still have some questions about it. > > 1. It seems "irqdomain->host_data->domain" can be NULL for blocking or > identity domain. So it's better to check whether it's NULL in > riscv_iommu_ir_irq_domain_alloc_irqs or > riscv_iommu_ir_irq_domain_free_irqs functions. Otherwise page fault > can happen. Indeed. Did you hit the NULL dereference in your testing? > > 2. It seems you are using the first stage iommu page table even for > gpa->spa, what if a VM needs an vIOMMU? Or did I miss something? Unfortunately the IOMMU spec wasn't clear on the use of the MSI table when only stage1 is in use and now, after discussions with the spec author, it appears what I have written won't work. Additionally, Jason didn't like this new approach to IRQ_DOMAIN_FLAG_ISOLATED_MSI either, so there's a lot of rework that needs to be done for v3. I had had hopes to dedicate December to this but got distracted with other things and vacation. Now I hope to dedicate this month, but I still need to get started! Thanks, drew > > [1] https://lore.kernel.org/all/20250920203851.2205115-20-ajones@ventanamicro.com/ > > Best regards, > Xu Lu _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv